Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
AD569AD Datasheet(PDF) 6 Page - Analog Devices |
|
AD569AD Datasheet(HTML) 6 Page - Analog Devices |
6 / 12 page AD569 REV. A –6– Figure 5. Typical DNL at Segment Boundary Transitions a. Segment 1 b. Segment 256 Figure 6. Typical DNL Within Segments MULTIPLYING FEEDTHROUGH ERROR: This is the error due to capacitive feedthrough from the reference to the output with the input registers loaded with all zeroes. FULL-SCALE ERROR: The AD569’s voltage dividing archi- tecture gives rise to a fixed full-scale error which is independent of the reference voltage. This error is trimmed by adjusting the voltage applied to the +VREF terminals. DIGITAL-TO-ANALOG GLITCH IMPULSE: The charge in- jected into the analog output when a new input is latched into the DAC register gives rise to the Digital-to-Analog Glitch Impulse. Glitches can be due to either time skews between the input bits or charge injection from the internal switches. Glitch Impulse for the AD569 is mainly due to charge injection, and is mea- sured with the reference connections tied to ground. It is speci- fied as the area of the glitch in nV-secs. TOTAL ERROR: The worst-case Total Error is the sum of the fixed full-scale and offset errors and the linearity error. POWER SUPPLY AND REFERENCE VOLTAGE RANGES The AD569 is specified for operation with ±12 volt power supplies. With ±10% power supply tolerances, the maximum reference voltage range is ±5 volts. Reference voltages up to ±6 volts can be used but linearity will degrade if the supplies approach their lower limits of ±10.8 volts (12 volts - 10%). If ±12 volt power supplies are unavailable in the system, several alternative schemes may be used to obtain the needed supply voltages. For example, in a system with ±15 V supplies, a single Zener diode can be used to reduce one of the supplies to 9 volts with the remaining one left at 15 volts. Figure 7a illustrates this scheme. A 1N753A or equivalent diode is an appropriate choice for the task. Asymmetrical power supplies can be used since the AD569’s output is referenced to –VREF only and thus floats relative to logic ground (GND, Pin 18). Assuming a worst-case ±1.5 volt tolerance on both supplies (10% of 15 volts), the maximum reference voltage ranges would be +6 and –2 volts for +VS = +15 V and VS = –9 V, and +2 to –8 volts for +VS = 9 V and –VS = –15 V . Alternately, two 3 V Zener diodes or voltage regulators can be used to drop each ±15 volt supply to ±12 volts, respectively. In Figure 7b, 1N746A diodes are a good choice for this task. A third method may be used if both ±15 volt and ±5 volt sup- plies are available. Figure 7c shows this approach. A combina- tion of +VS = +15 V and –VS = –5 V can support a reference range of 0 to 6 volts, while supplies of +VS = +5 V and –VS = –15 V can support a reference range of 0 to –8 volts. Again, 10% power supply tolerances are assumed. NOTE: Operation with +VS = +5 V alters the input latches’ op- erating conditions causing minimum write pulse widths to ex- tend to 1 µs or more. Control signals CS, HBE, LBE, and LDAC should, therefore, be tied low to render the latches trans- parent. No timing problems exist with operation at +VS = 9 V and –VS = –15 V. However, 10% tolerances on these supplies gener- ate a worst-case condition at –VS = –16.5 V and +VS = +7.5 V (assuming +VS is derived from a +15 V supply). Under these conditions, write pulse widths can stretch to 200 ns with similar degradation of data setup and hold times. However, ±0.75 V tolerances ( ±5%) yield minimal effects on digital timing with write pulse widths remaining below 100 ns. Finally, Figure 7d illustrates the use of the combination of an AD588 and AD569 in a system with ±15 volt supplies. As shown, the AD588 is connected to provide ±5 V to the refer- ence inputs of the AD569. It is doing double-duty by simulta- neously regulating the supply voltages for the AD569 through the use of the level shifting Zeners and transistors. This scheme utilizes the capability of the outputs of the AD588 to source as well as sink current. Two other benefits are realized by using this approach. The first is that the AD569 is no longer directly connected to the system power supplies. Output sensitivity to variations in those supplies is, therefore, eliminated. The second |
Número de pieza similar - AD569AD |
|
Descripción similar - AD569AD |
|
|
Enlace URL |
Política de Privacidad |
ALLDATASHEET.ES |
¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |