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AD7769JP Datasheet(PDF) 7 Page - Analog Devices |
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AD7769JP Datasheet(HTML) 7 Page - Analog Devices |
7 / 16 page AD7769 –7– REV. A Plus and Minus Full-Scale Error The ADC and DACs in the AD7769 can be considered as de- vices with bipolar (plus and minus) input ranges, but referred to VBIAS instead of AGND. Plus Full-Scale Error for the ADC is the difference between the actual input voltage at the FE to FF code transition and the ideal input voltage (VBIAS + VSWING –1.5 LSB), expressed in LSBs. Minus Full-Scale Error is similarly specified for the 01 to 00 code transition, relative to the ideal input voltage for this transition (VBIAS – VSWING +0.5 LSB). Plus Full-Scale Error for the DACs is the difference, expressed in LSBs, between the actual output voltage for input code FF and the ideal voltage (VBIAS + VSWING – 1 LSB). Minus Full-Scale Error is similarly specified for code 00, relative to the ideal output voltage (VBIAS – VSWING). Note that Plus and Minus Full-Scale errors for the ADC and the DAC outputs are measured after their respective Bias Offset errors have been adjusted out. Digital-to-Analog Glitch Impulse Digital-to-Analog Glitch Impulse is the impulse injected into the analog outputs when the digital inputs change state with either DAC selected. It is normally specified as the area of the glitch in nV secs and is measured when the digital input code is changed by 1 LSB at the major carry transition. Digital Feedthrough Digital Feedthrough is also a measure of the impulse injected into the analog outputs from the digital inputs but is measured when the DACs are not selected. This is essentially feedthrough across the die and package. It is important in the AD7769 since it is a measure of the glitch impulse transferred to the analog outputs when data is read from the ADC register. It is specified in nV secs and measured with WR high and a digital code change from all 0s to all 1s. Signal-to-Noise Ratio (SNR) SNR is the measured Signal-to-Noise Ratio at the output of the converter. The signal is the rms magnitude of the fundamental. Noise is the rms sum of all the nonfundamental signals up to half the sampling frequency. SNR is dependent on the number of quantization levels used in the digitization process; the more levels, the smaller the quantization noise. The theoretical SNR for a sine wave is given by SNR = (6.02N + 1.76) dB where N is the number of bits. Thus for an ideal 8-bit converter, SNR = 49.92 dB. Total Harmonic Distortion (THD) THD is the ratio of the rms sum of harmonics to the fundamen- tal. For the AD7769, Total Harmonic Distortion is defined as 20 log (V 2 2 + V 3 2 + V 4 2 + V 5 2 + V 6 2) 1/ 2 V 1 where V1 is the rms amplitude of the fundamental and V2, V3, V4, V5 and V6 are the rms amplitudes of the individual harmonics. Intermodulation Distortion (IMD) With inputs consisting of sine waves at two frequencies, fa and fb, any active device with nonlinearities will create distortion products, of order (m+n), at sum and difference frequencies of mfa+nfb, where m, n = 0, 1, 2, 3 . . . Intermodulation terms are those for which neither m nor n is equal to zero. For example, the second order terms include (fa+fb) and (fa–fb) and the third order terms include (2fa+fb), (2fa–fb), (fa+2fb) and (fa–2fb). LOGIC TRUTH TABLE ADC CHANNEL SELECT AND START CONVERSION CS ADC/DAC CHA/CHB WR RD DB0–DB7 INT Comments 0 0 X Note 1 Note 1 1 INT Is Set on Falling Edge of WR. 0 0 0 Note 1 Note 1 1 Select ADC Channel A and Start Conversion. 0 0 1 Note 1 Note 1 1 Select ADC Channel B and Start Conversion. 0 INT Goes Low at End of Conversion. READ ADC DATA CS ADC/DAC CHA/CHB WR RD DB0–DB7 INT Comments 0 X X X ADC Data 1 INT Is Set High on Falling Edge of RD. 0 X X X 0 ADC Data 1 ADC Data on Data Bus. 0 X X X High-Z 1 Data Outputs Impedance. WRITE TO DACA OR DACB CS ADC/DAC CHA/CHB WR RD DB0–DB7 INT Comments 01 0 1 µP Data N/C µP Writing Data to DACA. 01 1 1 µP Data N/C µP Writing Data to DACB. 0 1 0 0 ADC Data N/C Data from Last ADC Conversion Will Be Written to DACA. 0 1 1 0 ADC Data N/C Data from Last ADC Conversion Will Be Written to DACB. 1 X X X X High-Z N/C No Operation. NOTES 1If RD = 1, DB0–DB7 will remain high impedance. If RD = 0, DB0–DB7 will output previous ADC data. The RD input should not change during a conversion. 2X = Don’t Care. 3N/C = No Change. |
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