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AD8367 Datasheet(PDF) 10 Page - Analog Devices

No. de pieza AD8367
Descripción Electrónicos  500 MHz, Linear-in-dB VGA with AGC Detector
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

AD8367 Datasheet(HTML) 10 Page - Analog Devices

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REV. 0
AD8367
–10–
Power and Voltage Metrics
Although power is the traditional metric used in the analysis of
cascaded systems, most active circuit blocks fundamentally
respond to voltage. The relationship between power and voltage
is defined by the impedance level. When input and output imped-
ance levels are the same, power gain and voltage gain are identical.
However, when impedance levels change between input and
output, they differ. Thus, one must be very careful to use the
appropriate gain for system chain analyses. Quantities such as
OIP3 are quoted in dBV rms as well as dBm referenced to 200
Ω.
The dBV rms unit is defined as decibels relative to 1 V rms. In a
200
Ω environment, the conversion from dBV rms to dBm requires
the addition of 7 dB to the dBV rms value. For example, a
+2 dBV rms level corresponds to +9 dBm.
Noise and Distortion
Since the AD8367 consists of a passive variable attenuator
followed by a fixed gain amplifier, the noise and distortion
characteristics as a function of the gain voltage are easily pre-
dicted. The input-referred noise increases in proportion to the
attenuation level. Figure 4 shows noise figure, NF, as a func-
tion of VGAIN for the MODE pin pulled high. The minimum
NF of 7.5 dB occurs at maximum gain and increases 1 dB for
every 1 dB reduction in gain. In receiver applications, the
minimum NF should occur at the maximum gain where the
received signal presumably is weak. At higher levels, a lower
gain is needed, and the increased NF becomes less important.
VGAIN – V
0
1.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
60
50
–30
10
0
–10
–20
30
20
40
60
50
–30
10
0
–10
–20
30
20
40
NF
IIP3
Figure 4. Noise Figure and Input Third Order Inter-
cept vs. Gain (RSOURCE
200
Ω)
The input-referred distortion varies in a similar manner to the
noise. Figure 4 illustrates how the third-order intercept point at
the input, IIP3, behaves as a function of VGAIN. The highest IIP3
of 20 dBV rms (27 dBm re 200
Ω) occurs at minimum gain. The
IIP3 then decreases 1 dB for every 1 dB increase in gain. At lower
levels, a degraded IIP3 is acceptable. Overall, the dynamic range,
represented by the difference between IIP3 and NF, remains
reasonably constant as a function of gain. The output distortion
and compression are essentially independent of the gain. At low
gains, when the input level is high, input overload may occur,
causing premature distortion.
Output Centering
The output level is centered midway between ground and the
supply if the DECL pin is left floating. Alternatively, the out-
put level may be set by driving the DECL pin with the desired
reference level. As shown in Figure 5, the loop acts to suppress
deviations from the reference at outputs below its corner
frequency while not affecting signals above it. The maximum
corner frequency with no external capacitor is 500 kHz. The
corner frequency can be lowered arbitrarily by adding an exter-
nal capacitor, CHP:
f
C
HP
HP
(kHz)
(nF)+ .
=
10
002
(3)
A capacitor at pin DECL is recommended to decouple the
reference level to which the output is centered.
gm
HPFL
DECL
AV
1
VMID
VOUT
FROM
INPUT
MAIN
AMPLIFIER
CHP
Figure 5. The dc output level is centered to mid
supply by a control loop whose corner frequency is
determined by CHP.
RMS Detection
The AD8367 contains a square-law detector that senses the output
signal and compares it to a calibrated set-point of 354 mV rms
which corresponds to a 1 V p-p sine wave. Any difference between
the output and set-point generates a current which is integrated by
an external capacitor, CAGC, connected from the DETO pin to
ground, to provide an AGC control voltage. There is also an
internal 5 pF capacitor on the DETO pin.
The resulting voltage is used as an AGC bias. For this appli-
cation, the MODE pin is pulled low and the DETO pin is
tied to the GAIN pin. The output signal level is then regu-
lated to 354 mV rms. The AGC bias represents a calibrated
rms measure of the received signal strength (RSSI). Since in
the AGC mode the output signal is forced to the 354 mV rms
set-point (–9.02 dBV rms), Equation 2 can be recast to
express the strength of the received signal, VIN-RMS, in terms
of the AGC bias VDETO,
VV
IN RMS
DETO
=−
+
×
(dBV rms)
54 02
50
.
(4)
where –54.02 dBV rms
–45 dB
9.02 dBV rms.
For small changes in input signal level, VDETO responds with a
characteristic single-pole time constant,
τAGC, which is propor-
tional to CAGC,
τµ
AGC
AGC
C
( s)
(nF)
10
(5)
where the internal 5 pF capacitor has been lumped with the
external capacitor to give CAGC.


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