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AD872AJE Datasheet(PDF) 10 Page - Analog Devices |
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AD872AJE Datasheet(HTML) 10 Page - Analog Devices |
10 / 20 page REV. A –10– AD872A Figure 12 shows the common-mode rejection performance vs. frequency for a 1 V p-p common-mode input. This excellent common-mode rejection over a wide bandwidth affords the user the opportunity to eliminate many potential sources of input noise as common mode by using the differential input structure of the AD872A. INPUT FREQUENCY – Hz –20 –30 –40 –50 –60 –70 –80 –90 –100 105 106 107 108 Figure 12. Common-Mode Rejection vs. Input Frequency, 1 V p-p Input Figures 13 and 14 illustrate typical input connections for single- ended inputs. 1 AD872A VINA VINB 2 1V Figure 13. AD872A Single-Ended Input Connection AD872A VINA VINB 1V RT 2 1 Figure 14. AD872A Single-Ended Input Connection Using a Shielded Cable The cable shield is used as a ground connection for the VINB in- put, providing the best possible rejection of the cable noise from the input signal. Note also that the high input impedance of the AD872A allows the user to select the termination impedance, be it 50 ohms, or some other value. Furthermore, unlike many flash converters, most AD872A applications will not require an external buffer amplifier. If such an amplifier is required, we suggest either the AD811 or AD9617. Figure 15 illustrates how external amplifiers may be used to convert a single-ended input into a differential signal. The resis- tor values of 536 Ω and 562 Ω were selected to provide opti- mum phase matching between U1 and U2. VIN ( 0.5V) U2 AD872A 562 562 536 536 VINA VINB U1 Figure 15. Single-Ended to Differential Connections; U1, U2 = AD811 or AD9617 The use of the differential input signal can help to minimize even-order distortion from the input THA where performance beyond –70 dB is desired. Figure 16 shows the AD872A large signal (–0.5 dB) and small signal (–20 dB) frequency response. INPUT FREQUENCY – Hz 10 0 –10 –20 –30 –40 –50 104 105 106 107 108 Figure 16. Full Power (–0.5 dB) and Small Signal Response (–20 dB) vs. Input Frequency The AD872A’s wide input bandwidth facilitates rapid acquisi- tion of transient input signals: the input THA can typically settle to 12-bit accuracy from a full-scale input step in less than 40 ns. Figure 17 illustrates the typical acquisition of a full-scale input step. 4500 4000 3500 3000 2500 2000 1500 1000 500 0 0 10 20 30 40 50 60 70 80 nsec Figure 17. Typical AD872A Settling Time |
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