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ADDC02808PBKV Datasheet(PDF) 8 Page - Analog Devices |
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ADDC02808PBKV Datasheet(HTML) 8 Page - Analog Devices |
8 / 20 page ADDC02808PB REV. A –8– PULSEWIDTH – ms 250 200 0 0 150 50 100 150 100 50 MAXIMUM PEAK POWER LIMIT MAXIMUM CONTINUOUS POWER LIMIT 100W ave 50W ave 10W ave 25 75 125 Figure 17. Largest On-State Power vs. Pulsewidth that Maintains TJMAX ≤ 110 °C at 90 °C Baseplate TRANSIENT RESPONSE The standard ADDC02808PB is designed to deliver large changes, or pulses, in load current with minimum output volt- age deviation and an ultrafast return to the nominal output voltage. The compensation of the feedback loop is optimized, and output stability is insured, for a broad range of external load capacitance extending from 500 µF (R ESR = 20 m Ω) to 4,000 µF (RESR = 2.5 m Ω). The variables that impact pulse performance (the maximum output voltage deviation and the settling time) are: 1. Size of step change in the output current. 2. Amount of external load capacitance. 3. Internal compensation of the feedback loop (factory set). 4. Connection from converter output to load. Extensive modeling of the converter with ADI proprietary soft- ware permits analysis and prediction of the impact each of these parameters has on the pulse response. The analyses in this data sheet are based on the load capacitance being comprised of 100 µF, 100 mΩ tantalum load capacitors such as the CSR21 style. Figure 18 is the prediction of the standard converter’s response to a 24 A step change in load current (from 1 A to 25 A) with a load capacitance of 1,000 µF (R ESR = 10 m Ω). This is very close to the measured pulse response under the same conditions shown in Figure 6. 8.1 7.4 –200 800 –100 0 100 200 300 400 500 600 700 8 7.9 7.8 7.7 7.6 7.5 TIME – s Figure 18. Predicted Response to 24 A Step Change in Load Current, di/dt = 12 A/ µs, for C LOAD = 1,000 µF and RESR = 10 mΩ 8.1 7.4 –200 800 –100 0 100 200 300 400 500 600 700 8 7.9 7.8 7.7 7.6 7.5 TIME – s 12A STEP CHANGE 24A STEP CHANGE Figure 19. Predicted Response to 12 A and 24 A Step Change in Load Current, di/dt = 12 A/ µs, for C LOAD = 1000 µF and R ESR = 10 mΩ Step Change If the step change is less than 24 A, the pulse response will improve. For instance, with a 12 A step change, Figure 19 shows a comparison of the response for a 24 A step change and a 12 A step change in load. Load Capacitance Varying the external load capacitance and associated RESR be- tween the range of CLOAD = 500 µF (R ESR = 20 m Ω) and C LOAD = 4,000 µF (R ESR = 2.5 m Ω) results in the predicted waveforms shown in Figures 20, 21, and 22. As can be seen, the larger the capacitor, the smaller the deviation, but the longer the settling time. Table I lists the maximum output voltage deviations and settling times for the four combinations of CLOAD and RESR mentioned above. Note that these are based on the standard compensation for the feedback loop. Table I. Output Response to a 24 A (1 A–25 A) Step in Load Current (Standard Compensation) Typical Settling Time See CLOAD RESR Deviation (Within 1%) Figure 500 µF 20 m Ω –7% 150 µs20 1,000 µF 10 m Ω –6% 175 µs18 2,000 µF5 mΩ –5% 200 µs21 4,000 µF 2.5 m Ω –4% 250 µs22 8.1 7.4 –200 800 –100 0 100 200 300 400 500 600 700 8 7.9 7.8 7.7 7.6 7.5 TIME – s Figure 20. Predicted Response for 24 A Step Load Change in Load Current, di/dt = 12 A/ µs, for C LOAD = 500 µF and R ESR = 20 mΩ |
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