ADV7190 datasheet(11/69 Pages) AD

No. de pieza	ADV7190

Descripción Electrónicos	Video Encoder with Six 10-Bit DACs and Video Encoder with Six DAC Outputs

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ADV7190/ADV7191

–11–

REV. 0

I

N

T

E

R

P

O

L

A

T

O

R

MODULATOR

AND

HUE CONTROL

BRIGHTNESS

CONTROL

AND

ADD SYNC

AND

INTERPOLATOR

SATURATION

CONTROL

AND

ADD BURST

AND

INTERPOLATOR

PROGRAMMABLE

LUMA FILTER

AND

SHARPNESS

FILTER

PROGRAMMABLE

CHROMA

FILTER

SIN/COS

DDS

BLOCK

REAL-TIME

CONTROL

CIRCUIT

SCRESET/RTC/TR

I

N

T

E

R

P

O

L

A

T

O

R

M

U

L

T

I

P

L

E

X

E

R

YUV-TO-RGB

MATRIX

AND

YUV LEVEL

CONTROL

BLOCK

10-BIT

DAC

10-BIT

DAC

10-BIT

DAC

CONTROL

BLOCK

10-BIT

DAC

10-BIT

DAC

10-BIT

DAC

CONTROL

BLOCK

DAC A

DAC B

DAC C

VREF

RSET2

COMP2

DAC D

DAC F

DAC E

RSET1

COMP1

DNR

AND

GAMMA

CORRECTION

10

V

U

Y

YCrCb

TO

YUV

MATRIX

10

V

U

Y

PLL

DEMUX

10 10

10

TELETEXT

INSERTION

BLOCK

VIDEO TIMING

GENERATOR

CGMS/WSS

AND

CLOSED CAPTIONING

CONTROL

I2C MPU PORT

ALSB

SDA

SCL

PAL_NTSC

VSO/CLAMP

CSO_HSO

HSYNC

VSYNC

BLANK

RESET

TTX

TTXRQ

P0

P15

CLKIN

CLKOUT

ADV7190/ADV7191

Figure 4. Detailed Functional Block Diagram

DETAILED DESCRIPTION OF FEATURES

Clocking:

Single 27 MHz Clock Required to Run the Device

4

Oversampling with Internal 54 MHz PLL

Square Pixel Operation

Advanced Power Management

Programmable Video Control Features:

Digital Noise Reduction

Pedestal level

Hue, Brightness, Contrast and Saturation

Clamping Output Signal

VBI (Vertical Blanking Interval)

Subcarrier Frequency and Phase

LUMA Delay

CHROMA Delay

Gamma Correction

Luma and Chroma Filters

Luma SSAF (Super Subalias Filter)

Average Brightness Detection

Field Counter

Interlaced/Noninterlaced Operation

Complete On-Chip Video Timing Generator

Programmable Multimode Master/Slave Operation

CGMS (Copy Generation Management System)

WSS (Wide Screen Signaling)

Macrovision 7.1 Rev

Closed Captioning Support

Teletext Insertion Port (PAL-WST)

2-Wire Serial MPU Interface

I2C Registers Synchronized to VSYNC

GENERAL DESCRIPTION

The ADV7190/ADV7191 is an integrated Digital Video Encoder

that converts digital CCIR-601/656 4:2:2 8-bit or 16-bit com-

ponent video data into a standard analog baseband television

signal compatible with worldwide standards.

Six DACs are available on the ADV7190/ADV7191, each of which

is capable of providing 4.33 mA of current. In addition to the

composite output signal there is the facility to output S-Video

(Y/C Video), RGB Video and YUV Video. All YUV formats

(Betacam, MII and (SMPTE/EBU N10) are supported.

Digital Noise Reduction allows improved picture quality in remov-

ing low amplitude, high frequency noise. The block diagram below

shows the DNR functionality in the two modes available.

SUBTRACT SIGNAL IN THRESHOLD

RANGE FROM ORIGINAL SIGNAL

FILTER OUTPUT

>THRESHOLD?

FILTER OUTPUT<

THRESHOLD

INPUT FILTER

BLOCK

MAIN SIGNAL PATH

NOISE SIGNAL PATH

Y DATA

INPUT

DNR OUT

ADD SIGNAL ABOVE THRESHOLD

RANGE TO ORIGINAL SIGNAL

DNR CONTROL

BLOCK SIZE CONTROL

BORDER AREA

BLOCK OFFSET

GAIN

CORING GAIN DATA

CORING GAIN BORDER

DNR SHARPNESS MODE

FILTER OUTPUT

<THRESHOLD?

FILTER OUTPUT>

THRESHOLD

INPUT FILTER

BLOCK

MAIN SIGNAL PATH

NOISE SIGNAL PATH

Y DATA

INPUT

DNR OUT

DNR CONTROL

BLOCK SIZE CONTROL

BORDER AREA

BLOCK OFFSET

GAIN

CORING GAIN DATA

CORING GAIN BORDER

DNR MODE

Figure 5. Block Diagram for DNR Mode and DNR Sharpness

Mode

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