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TPS43061RTET Datasheet(PDF) 2 Page - Texas Instruments |
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TPS43061RTET Datasheet(HTML) 2 Page - Texas Instruments |
2 / 32 page PowerPAD (17) 16 FB COMP SS RT/CLK PGND VCC BOOT SW 15 14 13 5 6 7 8 1 2 3 4 12 11 10 9 TPS43060 TPS43061 SLVSBP4A – DECEMBER 2012 – REVISED DECEMBER 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. DEVICE INFORMATION Table 1. Ordering Information (1) TJ PACKAGE PART NUMBER(2) -40 ˚C to 150˚C QFN-16 TPS43060RTE -40 ˚C to 150˚C QFN-16 TPS43061RTE (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) The RTE package is available in large and small reel packaging. Add an R suffix to the device type (TPS43061RTER) for the large reel, or T (TPS43061RTET) for the small reel. QFN-16 PACKAGE (TOP VIEW) PIN FUNCTIONS PIN DESCRIPTION NAME NO. Resistor Timing and External Clock. An external resistor from this pin to the AGND pin programs the RT/CLK 1 switching frequency between 50 kHz and 1MHz. Driving the pin with an external clock between 300 kHz to 1 MHz will synchronize the switching frequency to the external clock. SS 2 Soft-start programming pin. A capacitor between the SS pin and AGND pin sets soft-start time. Output of the internal transconductance error amplifier. The feedback loop compensation network is COMP 3 connected from this pin to AGND. Error amplifier input and feedback pin for voltage regulation. Connect this pin to the center tap of a FB 4 resistor divider to set the output voltage. Inductor current sense comparator inverting input pin. This pin is normally connected to the inductor ISNS- 5 side of the current sense resistor. Inductor current sense comparator non-inverting input pin. This pin is normally connected to the VIN ISNS+ 6 side of the current sense resistor. The input supply pin to the IC. Connect VIN to a supply voltage between 4.5 V and 38 V. It is VIN 7 acceptable for the voltage on the VIN pin to be different from the boost power stage input, ISNS+ and ISNS- pins. Low side gate driver output. Connect this pin to the gate of the low side N-channel MOSFET. When LDRV 8 VIN bias is removed, an internal 200 k Ω resistor pulls LDRV to PGND. Power ground of the IC. Connect this pin to the source of the low-side MOSFET. PGND should be PGND 9 connected to AGND via a single point on printed circuit board. 2 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: TPS43060 TPS43061 |
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