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TPS53015 Datasheet(PDF) 7 Page - Texas Instruments |
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TPS53015 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 21 page ( ) IN OUT OUT OUT(LL) SW IN V -V ×V 1 I = × 2×L×f V TPS53015 www.ti.com SLVSBF0B – JULY 2012 – REVISED AUGUST 2012 AUTO-SKIP Eco-Mode™ CONTROL The TPS53015 is designed with Auto-Skip Eco-mode™ to increase light load efficiency. As the output current decreases from heavy load condition, the inductor current is also reduced and eventually comes to point where its rippled valley touches zero level, which is the boundary between continuous conduction and discontinuous conduction modes. The rectifying MOSFET is turned off when its zero inductor current is detected. As the load current further decreases the converter run into discontinuous conduction mode. The on-time is kept almost half as is was in the continuous conduction mode because it takes longer time to discharge the output capacitor with smaller load current to the level of the reference voltage. The transition point to the light load operation IOX(LL) current can be calculated in Equation 1 with 500kHz used as fsw. (1) DRIVERS TPS53015 contains two high-current resistive MOSFET gate drivers. The low-side driver is a PGND referenced, VREG5 powered driver designed to drive the gate of a high-current, low RDS(on) N-channel MOSFET whose source is connected to PGND. The high-side driver is a floating SW referenced, VBST powered driver designed to drive the gate of a high-current, low RDS(on) N-channel MOSFET. To maintain the VBST voltage during the high-side driver ON time, a capacitor is placed from SW to VBST. Each driver draws average current equal to Gate Charge (Qg @ Vgs = 5V) times Switching frequency (fsw). To prevent cross-conduction, there is a narrow dead-time when both high-side and low-side drivers are OFF between each driver transition. During this time the inductor current is carried by one of the MOSFETs body diodes. 5-VOLT REGULATOR The TPS53015 has an internal 5V Low-Dropout (LDO) Regulator to provide a regulated voltage for all both drivers and the ICs internal logic. A high-quality 4.7µF or greater ceramic capacitor from VREG5 to GND is required to stabilize the internal regulator. SOFT START AND PRE-BIASED SOFT START The TPS53015 has an internally set, 1.4 ms soft start time. When the EN pin becomes high and the VREG5 voltage is above the UVLO threshold, an internal DAC ramps up the reference voltage to the PWM comparator. Smooth control of the output voltage is maintained during start up. The TPS53015 contains a unique circuit to prevent current from being pulled from the output during startup if the output is pre-biased. When the soft-start commands a voltage higher than the pre-bias level (internal soft start becomes greater than internal feedback voltage VFB), the controller slowly activates synchronous rectification by starting the first low side FET gate driver pulses with a narrow on-time. It then increments that on-time on a cycle-by-cycle basis until it coincides with the time dictated by (1-D), where D is the duty cycle of the converter. This scheme prevents the initial sinking of the pre-biased output, and ensures that the output voltage (VO) starts and ramps up smoothly into regulation from pre-biased startup to normal mode operation. Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links :TPS53015 |
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