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ADM2483BRWZ Datasheet(PDF) 4 Page - Analog Devices |
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ADM2483BRWZ Datasheet(HTML) 4 Page - Analog Devices |
4 / 20 page ADM2483 Rev. B | Page 4 of 20 TIMING SPECIFICATIONS 2.7 ≤ VDD1 ≤ 5.5 V, 4.75 V ≤ VDD2 ≤ 5.25 V, TA = TMIN to TMAX, unless otherwise noted. Table 2. Parameter Min Typ Max Unit Test Conditions/Comments DRIVER Maximum Data Rate 500 kbps Propagation Delay, tPLH, tPHL 250 620 ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 5 and Figure 9 Skew, tSKEW 40 ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 5 and Figure 9 Rise/Fall Time, tR, tF 200 600 ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 5 and Figure 9 Enable Time 1050 ns RL = 500 Ω, CL = 100 pF, see Figure 6 and Figure 11 Disable Time 1050 ns RL = 500 Ω, CL = 15 pF, see Figure 6 and Figure 11 RECEIVER Propagation Delay, tPLH, tPHL 400 1050 ns CL = 15 pF, see Figure 7 and Figure 10 Differential Skew, tSKEW 250 ns CL = 15 pF, see Figure 7 and Figure 10 Enable Time 25 70 ns RL = 1 kΩ, CL = 15 pF, see Figure 8 and Figure 12 Disable Time 40 70 ns RL = 1 kΩ, CL = 15 pF, see Figure 8 and Figure 12 POWER VALID INPUT Enable Time 1 2 µs Disable Time 3 5 µs |
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