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DM74AS34 Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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DM74AS34 Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 3 page © 2000 Fairchild Semiconductor Corporation DS006281 www.fairchildsemi.com September 1986 Revised March 2000 DM74AS34 Hex Non-Inverter General Description These devices contain six independent gates, each of which performs the logic identity function. Features s Switching specifications at 50 pF s Switching specifications guaranteed over full tempera- ture and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL process Ordering Code: Connection Diagram Function Table Y = A H = HIGH Logic Level L = LOW Logic Level Order Number Package Number Package Description DM74AS34N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Input Output AY HH LL |
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