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CDCM7005RGZR Datasheet(PDF) 6 Page - Texas Instruments

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No. de pieza CDCM7005RGZR
Descripción Electrónicos  3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER
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Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI - Texas Instruments

CDCM7005RGZR Datasheet(HTML) 6 Page - Texas Instruments

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CDCM7005
SCAS793E – JUNE 2005 – REVISED FEBRUARY 2013
www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE / UNIT
VCC, AVCC, VCC_CP
Supply voltage range (2)
–0.5 V to 4.6 V
VI
Input voltage range (3)
–0.5 V to VCC + 0.5 V
VO
Output voltage range (3)
–0.5 V to VCC + 0.5 V
Output current for LVPECL/LVCMOS outputs
IOUT
±50 mA
(0 < VO < VCC)
IIN
Input current (VI < 0, VI > VCC)
±20 mA
Tstg
Storage temperature range
–65°C to 150°C
TJ
Maximum junction temperature
125°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2)
All supply voltages have to be supplied at the same time.
(3)
The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
Package Thermal Resistance for RGZ (QFN) Package
(1) (2)
Airflow (lfm)
θJA (°C/W)
θJC (°C/W)
θJP (°C/W)
(3)
ψJT (°C/W)
0
29.9
22.4
1.5
0.2
150
24.7
0.2
250
23.2
0.2
500
21.5
0.3
(1)
The package thermal impedance is calculated in accordance with JESD 51 and JEDEC2S2P (high-k board).
(2)
Connected to GND with nine thermal vias (0,3 mm diameter).
(3)
θJP (junction pad) is used for the QFN package, because the main heat flow is from the junction to the GND pad of the QFN.
Package Thermal Resistance for ZVA (BGA) Package
(1)
Airflow (m/s)
θJA (°C/W)
θJC (°C/W)
θJB (°C/W)
(2)
ψJT (°C/W)
0 m/s
53.9
28.3
38.6
0.7
1 m/s
49.8
0.7
2 m/s
48.5
0.8
(1)
The package thermal impedance is calculated in accordance with JESD 51 and JEDEC2S2P (high-k board).
(2)
θJB (junction board) is used for the BGA package, because the main heat flow is from junction to the board.
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
UNIT
VCC, AVCC
3
3.3
3.6
Supply voltage
V
VCC_CP
2.3
VCC
VIL
Low-level input voltage LVCMOS, see (1)
0.3 VCC
V
VIH
High-level input voltage LVCMOS, see (1)
0.7 VCC
V
IOH
High-level output current LVCMOS (includes all status pins)
–8
mA
IOL
Low-level output current LVCMOS (includes all status pins)
8
mA
VI
Input voltage range LVCMOS
0
3.6
V
VINPP
Input amplitude LVPECL (VVCXO_IN – V VCXO_IN )
(2)
0.5
1.3
V
VIC
Common-mode input voltage LVPECL
1
VCC–0.3
V
TA
Operating free-air temperature
–40
85
°C
(1)
VIL and VIH are required to maintain ac specifications; the actual device function tolerates a smaller input level of 1V, if an ac-coupling to
VCC/2 is provided.
(2)
VINPP minimum and maximum is required to maintain ac specifications; the actual device function tolerates at a minimum VINPP
of 150 mV.
6
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