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FM28V020-SG Datasheet(PDF) 3 Page - Cypress Semiconductor

No. de pieza FM28V020-SG
Descripción Electrónicos  256Kbit Bytewide F-RAM Memory
Download  16 Pages
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Fabricante Electrónico  CYPRESS [Cypress Semiconductor]
Página de inicio  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

FM28V020-SG Datasheet(HTML) 3 Page - Cypress Semiconductor

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FM28V020 - 32Kx8 F-RAM
Document Number: 001-86204 Rev. *A
Page 3 of 16
Functional Truth Table
/CE
/WE
A(14:3)
A(2:0)
Operation
H
X
X
X
Standby/Idle
H
V
V
Read
L
H
No Change
Change
Page Mode Read
L
H
Change
V
Random Read
L
V
V
/CE-Controlled Write
2
L
V
V
/WE-Controlled Write
2, 3
L
No Change
V
Page Mode Write
4
X
X
X
Starts Precharge
Notes:
1)
H=Logic High, L=Logic Low, V=Valid Address, X=Don’t Care.
2)
For write cycles, data-in is latched on the rising edge of /CE or /WE, whichever comes first.
3)
/WE-controlled write cycle begins as a Read cycle and A(14:3) is latched then.
4)
Addresses A(2:0) must remain stable for at least 15 ns during page mode operation.
Pin Configurations
SOIC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A14
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
DQ4
DQ5
DQ6
DQ7
OE
A8
A13
WE
A9
A10
A11
VDD
A12
A7
A6
A5
A4
CE
DQ3
28-pin
TSOP-I
(-T28G)
22
23
24
25
26
27
28
1
2
3
4
5
6
7
OE
A11
A9
A8
A13
WE
VDD
A14
A12
A7
A6
A5
A4
A3
21
20
19
18
17
16
15
14
13
12
11
10
9
8
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
32-pin
TSOP-I
(-TG)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NC
OE
A11
A9
A8
A13
WE
VDD
A14
A12
A7
A6
A5
A4
A3
NC
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
NC
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
NC


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