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FM28V020-T28G Datasheet(PDF) 6 Page - Cypress Semiconductor |
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FM28V020-T28G Datasheet(HTML) 6 Page - Cypress Semiconductor |
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6 / 16 page  FM28V020 - 32Kx8 F-RAM Document Number: 001-86204 Rev. *A Page 6 of 16 SRAM Drop-In Replacement The FM28V020 has been designed to be a drop-in replacement for standard asynchronous SRAMs. The device does not require /CE to toggle for each new address. /CE may remain low indefinitely while VDD is applied. When /CE is low, the device automatically detects address changes and a new access begins. It also allows page mode operation at speeds up to 15MHz. A typical application is shown in Figure 2. It shows a pullup resistor on /CE which will keep the pin high during power cycles assuming the MCU/MPU pin tri- states during the reset condition. The pullup resistor value should be chosen to ensure the /CE pin tracks VDD yet a high enough value that the current drawn when /CE is low is not an issue. Figure 2. Typical Application using Pullup Resistor on /CE For applications that require the lowest power consumption, the /CE signal should be active only during memory accesses. Due to the external pullup resistor, some supply current will be drawn while /CE is low. When /CE is high, the device draws no more than the maximum standby current ISB. Note that if /CE is grounded, the user must be sure /WE is not low at powerup or powerdown events. If the chip is enabled and /WE is low during power cycles, data corruption will occur. Figure 3 shows a pullup resistor on /WE which will keep the pin high during power cycles assuming the MCU/MPU pin tri- states during the reset condition. The pullup resistor value should be chosen to ensure the /WE pin tracks VDD yet a high enough value that the current drawn when /WE is low is not an issue. A 10Kohm resistor draws 330uA when /WE is low and VDD=3.3V. Figure 3. Use of Pullup Resistor on /WE The FM28V020 is backward compatible with the 256Kbit FM18L08 device. Operating the FM28V020 with /CE toggling low on every address is perfectly acceptable. PCB Layout Recommendations A 0.1uF decoupling capacitor should be placed close to pin 28 (VDD) and the ground side of the capacitor should be connected to either a ground plane or low impedance path back to pin 14 (VSS). It is best to use a chip capacitor that has low ESR and has good high frequency characteristics. If the controller drives the address and chip enable from the same timing edge, it is best to keep the address routes short and of equal length. A simple RC circuit may be inserted in the chip enable path to provide some delay and timing margin for the FM28V020’s address setup time tAS. As a general rule, the layout designer may need to add series termination resistors to controller outputs that have fast transitions or routes that are > 15cm in length. This is only necessary if the edge rate is less than or equal to the round trip trace delay. Signal overshoot and ringback may be large enough to cause erratic device behavior. It is best to add a 50 ohm resistor (30 – 60 ohms) near the output driver (controller) to reduce such transmission line effects. CE WE OE A(14:0) DQ(7:0) FM28V020 VDD MCU/ MPU R CE WE OE A(14:0) DQ(7:0) FM28V020 VDD MCU/ MPU R |
Número de pieza similar - FM28V020-T28G |
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Descripción similar - FM28V020-T28G |
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