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MC145483ENR2 Datasheet(PDF) 9 Page - Freescale Semiconductor, Inc

No. de pieza MC145483ENR2
Descripción Electrónicos  3 V 13-BIT LINEAR PCM CODEC-FILTER
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Fabricante Electrónico  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC145483ENR2 Datasheet(HTML) 9 Page - Freescale Semiconductor, Inc

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MC145483
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
The MC145483 is manufactured using high–speed CMOS
VLSI technology to implement the complex analog signal
processing functions of a PCM Codec–Filter. The fully–differ-
ential analog circuit design techniques used for this device
result in superior performance for the switched capacitor fil-
ters, the analog–to–digital converter (ADC) and the digital–
to–analog converter (DAC). Special attention was given to
the design of this device to reduce the sensitivities of noise,
including power supply rejection and susceptibility to radio
frequency noise. This special attention to design includes a
fifth order low–pass filter, followed by a third order high–pass
filter whose output is converted to a digital signal with greater
than 75 dB of dynamic range, all operating on a single 3 V
power supply. This results in an LSB size for small audio sig-
nals of about 216
µV. The typical idle channel noise level of
this device is less than one LSB. In addition to the dynamic
range of the codec–filter function of this device, the input
gain–setting op amp has the capability of greater than 30 dB
of gain intended for an electret microphone interface.
This device was designed for ease of implementation, but
due to the large dynamic range and the noisy nature of the
environment for this device (digital switches, radio tele-
phones, DSP front–end, etc.) special care must be taken to
assure optimum analog transmission performance.
PC BOARD MOUNTING
It is recommended that the device be soldered to the PC
board for optimum noise performance. If the device is to be
used in a socket, it should be placed in a low parasitic pin
inductance (generally, low–profile) socket.
POWER SUPPLY, GROUND, AND NOISE
CONSIDERATIONS
This device is intended to be used in switching applica-
tions which often require plugging the PC board into a rack
with power applied. This is known as ‘‘hot–rack insertion.’’ In
these applications care should be taken to limit the voltage
on any pin from going positive of the VDD pins, or negative of
the VSS pins. One method is to extend the ground and power
contacts of the PCB connector. The device has input protec-
tion on all pins and may source or sink a limited amount of
current without damage. Current limiting may be accom-
plished by series resistors between the signal pins and the
connector contacts.
The most important considerations for PCB layout deal
with noise. This includes noise on the power supply, noise
generated by the digital circuitry on the device, and cross
coupling digital or radio frequency signals into the audio sig-
nals of this device. The best way to prevent noise is to:
1. Keep digital signals as far away from audio signals as
possible.
2. Keep radio frequency signals as far away from the audio
signals as possible.
3. Use short, low inductance traces for the audio circuitry
to reduce inductive, capacitive, and radio frequency
noise sensitivities.
4. Use short, low inductance traces for digital and RF
circuitry to reduce inductive, capacitive, and radio
frequency radiated noise.
5. Bypass capacitors should be connected from the VDD,
VAG Ref, and VAG pins to VSS with minimal trace length.
Ceramic monolithic capacitors of about 0.1
µF are
acceptable for the VDD and VAG Ref pins to decouple the
device from its own noise. The VDD capacitor helps
supply the instantaneous currents of the digital circuitry
in addition to decoupling the noise which may be
generated by other sections of the device or other
circuitry on the power supply. The VAG Ref decoupling
capacitor is effecting a low–pass filter to isolate the
mid–supply voltage from the power supply noise gener-
ated on–chip, as well as external to the device. The VAG
decoupling capacitor should be about 0.01
µF. This
helps to reduce the impedance of the VAG pin to VSS at
frequencies above the bandwidth of the VAG generator,
which reduces the susceptiblility to RF noise.
6. Use a short, wide, low inductance trace to connect the
VSS ground pin to the power supply ground. The VSS pin
is the digital ground and the most negative power supply
pin for the analog circuitry. All analog signal processing
is referenced to the VAG pin, but because digital and RF
circuitry will probably be powered by this same ground,
care must be taken to minimize high frequency noise in
the VSS trace. Depending on the application, a double–
sided PCB with a VSS ground plane connecting all of the
digital and analog VSS pins together would be a good
grounding method. A multilayer PC board with a ground
plane connecting all of the digital and analog VSS pins
together would be the optimal ground configuration.
These methods will result in the lowest resistance and
the lowest inductance in the ground circuit. This is
important to reduce voltage spikes in the ground circuit
resulting from the high speed digital current spikes. The
magnitude of digitally induced voltage spikes may be
hundreds of times larger than the analog signal the
device is required to digitize.
7. Use a short, wide, low inductance trace to connect the
VDD power supply pin to the 3 V power supply.
Depending on the application, a double–sided PCB with
VDD bypass capacitors to the VSS ground plane, as
described above, may complete the low impedance
coupling for the power supply. For a multilayer PC board
with a power plane, connecting all of the VDD pins to the
power plane would be the optimal power distribution
method. The integrated circuit layout and packaging
considerations for the 3 V VDD power circuit are
essentially the same as for the VSS ground circuit.
8. The VAG pin is the reference for all analog signal
processing. In some applications the audio signal to be
digitized may be referenced to the VSS ground. To
reduce the susceptibility to noise at the input of the ADC
section, the three–terminal op amp may be used in a
differential to single–ended circuit to provide level
conversion from the VSS ground to the VAG ground with
noise cancellation. The op amp may be used for more
than 30 dB of gain in microphone interface circuits, which
will require a compact layout with minimum trace lengths
as well as isolation from noise sources. It is recom-
mended that the layout be as symmetrical as possible to
avoid any imbalances which would reduce the noise
cancelling benefits of this differential op amp circuit.
Refer to the application schematics for examples of this
circuitry.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com


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