Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
AD5625BCPZ-R2 Datasheet(PDF) 11 Page - Analog Devices |
|
AD5625BCPZ-R2 Datasheet(HTML) 11 Page - Analog Devices |
11 / 36 page Data Sheet AD5625R/AD5645R/AD5665R, AD5625/AD5665 Rev. C | Page 11 of 36 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 4. Pin Configuration (14-Lead TSSOP), R Suffix Version Figure 5. Pin Configuration (14-Lead TSSOP) Figure 6. Pin Configuration (10-Lead LFCSP), R Suffix Version Figure 7. Pin Configuration (10-Lead LFCSP) Table 7. Pin Function Descriptions Pin Number 14-Lead 10-Lead Mnemonic Description 1 N/A LDAC Pulsing this pin low allows any or all DAC registers to be updated if the input registers have new data. This allows simultaneous update of all DAC outputs. Alternatively, this pin can be tied permanently low. 2 N/A ADDR1 Three-State Address Input. Sets the two least significant bits (Bit A1, Bit A0) of the 7-bit slave address (see Table 10). 3 9 VDD Power Supply Input. These parts can be operated from 2.7 V to 5.5 V, and the supply should be decoupled with a 10 μF capacitor in parallel with a 0.1 μF capacitor to GND. 4 1 VOUTA Analog Output Voltage from DAC A. The output amplifier has rail-to-rail operation. 5 4 VOUTC Analog Output Voltage from DAC C. The output amplifier has rail-to-rail operation. 6 N/A POR Power-On Reset Pin. Tying the POR pin to GND powers up the part to 0 V. Tying the POR pin to VDD powers up the part to midscale. 7 10 VREFIN/VREFOUT The AD56x5R have a common pin for reference input and reference output. When using the internal reference, this is the reference output pin. When using an external reference, this is the reference input pin. The default for this pin is as a reference input. (The internal reference and reference output are only available on R suffix versions.) The AD56x5 has a reference input pin only. 8 N/A ADDR2 Three-State Address Input. Sets Bit A3 and Bit A2 of the 7-bit slave address (see Table 10). 9 N/A CLR Asynchronous Clear Input. The CLR input is falling-edge sensitive. While CLR is low, all LDAC pulses are ignored. When CLR is activated, zero scale is loaded to all input and DAC registers. This clears the output to 0 V. The part exits clear code mode on the falling edge of the ninth clock pulse of the last byte of the valid write. If CLR is activated during a write sequence, the write is aborted. If CLR is activated during high speed mode, the part exits high speed mode. 10 5 VOUTD Analog Output Voltage from DAC D. The output amplifier has rail-to-rail operation. 11 2 VOUTB Analog Output Voltage from DAC B. The output amplifier has rail-to-rail operation. 12 3 GND Ground Reference Point for All Circuitry on the Part. 13 8 SDA Serial Data Line. This is used in conjunction with the SCL line to clock data into or out of the 16-bit input register. It is a bidirectional, open-drain data line that should be pulled to the supply with an external pull-up resistor. 14 7 SCL Serial Clock Line. This is used in conjunction with the SDA line to clock data into or out of the 16-bit input register. N/A 6 ADDR Three-State Address Input. Sets the two least significant bits (Bit A1, Bit A0) of the 7-bit slave address (see Table 9). EPAD For the 10-lead LFCSP, the exposed pad must be tied to GND. 1 LDAC 14 SCL 2 ADDR1 13 SDA 3 VDD 12 GND 4 VOUTA 11 VOUTB 5 VOUTC 10 VOUTD 6 POR 9 CLR 7 VREFIN/VREFOUT 8 ADDR2 AD5625R/ AD5645R/ AD5665R TOP VIEW (Not to Scale) 1 LDAC 14 SCL 2 ADDR1 13 SDA 3 VDD 12 GND 4 VOUTA 11 VOUTB 5 VOUTC 10 VOUTD 6 POR 9 CLR 7 VREFIN 8 ADDR2 AD5625/ AD5665 TOP VIEW (Not to Scale) 1 VOUTA 10 VREFIN/VREFOUT 2 VOUTB 9 VDD 3 GND 8 SDA 4 VOUTC 7 SCL 5 VOUTD 6 ADDR AD5625R/ AD5645R/ AD5665R TOP VIEW (Not to Scale) EXPOSED PAD TIED TO GND. 1 VOUTA 10 VREFIN 2 VOUTB 9 VDD 3 GND 8 SDA 4 VOUTC 7 SCL 5 VOUTD 6 ADDR AD5625/ AD5665 TOP VIEW (Not to Scale) EXPOSED PAD TIED TO GND. |
Número de pieza similar - AD5625BCPZ-R2 |
|
Descripción similar - AD5625BCPZ-R2 |
|
|
Enlace URL |
Política de Privacidad |
ALLDATASHEET.ES |
¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |