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74LVC1G74DC.125 Datasheet(PDF) 4 Page - NXP Semiconductors |
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74LVC1G74DC.125 Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 25 page 74LVC1G74 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 12 — 2 April 2013 4 of 25 NXP Semiconductors 74LVC1G74 Single D-type flip-flop with set and reset; positive edge trigger 6. Pinning information 6.1 Pinning Fig 4. Pin configuration SOT505-2 and SOT765-1 Fig 5. Pin configuration SOT833-1, SOT1089, SOT1116 and SOT1203 74LVC1G74 CP VCC DSD QRD GND Q 001aab659 1 2 3 4 6 5 8 7 74LVC1G74 RD SD VCC Q Q D CP GND 001aab658 36 27 18 45 Transparent top view Fig 6. Pin configuration SOT996-2 Fig 7. Pin configuration SOT902-2 001aah948 74LVC1G74 Transparent top view 8 7 6 5 1 2 3 4 CP D Q GND VCC SD RD Q 001aaf641 D RD CP Q SD Q Transparent top view 3 6 1 5 7 2 terminal 1 index area 74LVC1G74 |
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