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SI4330-B1 Datasheet(PDF) 11 Page - Silicon Laboratories |
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SI4330-B1 Datasheet(HTML) 11 Page - Silicon Laboratories |
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11 / 64 page  Si4330-B1 Rev 1.0 11 Table 5. Digital IO Specifications (SDO, SDI, SCLK, nSEL, and nIRQ) Parameter Symbol Conditions Min Typ Max Units Rise Time TRISE 0.1 x VDD to 0.9 x VDD, CL= 5 pF — — 8 ns Fall Time TFALL 0.9 x VDD to 0.1 x VDD, CL= 5 pF — — 8 ns Input Capacitance CIN —— 1 pF Logic High Level Input Voltage VIH VDD –0.6 — — V Logic Low Level Input Voltage VIL —0.6 V Input Current IIN 0<VIN< VDD –100 — 100 nA Logic High Level Output Voltage VOH IOH<1 mA source, VDD=1.8 V VDD –0.6 — — V Logic Low Level Output Voltage VOL IOL<1 mA sink, VDD=1.8 V — — 0.6 V Note: All specifications guaranteed by qualification. Qualification test conditions are listed in the "Production Test Conditions" section on page 13. Table 6. GPIO Specifications (GPIO_0, GPIO_1, and GPIO_2) Parameter Symbol Conditions Min Typ Max Units Rise Time TRISE 0.1 x VDD to 0.9 x VDD, CL= 10 pF, DRV<1:0>=HH —— 8 ns Fall Time TFALL 0.9 x VDD to 0.1 x VDD, CL= 10 pF, DRV<1:0>=HH —— 8 ns Input Capacitance CIN —— 1 pF Logic High Level Input Voltage VIH VDD –0.6 — V Logic Low Level Input Voltage VIL —— 0.6 V Input Current IIN 0<VIN< VDD –100 — 100 nA Input Current If Pullup is Activated IINP VIL=0 V 5 — 25 µA Maximum Output Current IOmaxLL DRV<1:0>=LL 0.1 0.5 0.8 mA IOmaxLH DRV<1:0>=LH 0.9 2.3 3.5 mA IOmaxHL DRV<1:0>=HL 1.5 3.1 4.8 mA IOmaxHH DRV<1:0>=HH 1.8 3.6 5.4 mA Logic High Level Output Voltage VOH IOH< IOmax source, VDD=1.8 V VDD –0.6 — — V Logic Low Level Output Voltage VOL IOL< IOmax sink, VDD=1.8 V —— 0.6 V Note: All specifications guaranteed by qualification. Qualification test conditions are listed in the "Production Test Conditions" section on page 13. |
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