74ABT125N datasheet(6/15 Pages) NXP

No. de pieza	74ABT125N

Descripción Electrónicos	Quad buffer; 3-state

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Fabricante Electrónico	NXP [NXP Semiconductors]

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74ABT125_4

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Product data sheet

Rev. 04 — 27 April 2010

6 of 15

NXP Semiconductors

74ABT125

Quad buffer; 3-state

VM =1.5 V

VOL and VOH are typical voltage output levels that occur with the output load.

Fig 7.

Enable and disable times

001aal294

tPLZ

tPHZ

outputs

disabled

outputs

enabled

VOH − 0.3 V

VOL + 0.3 V

outputs

enabled

output

LOW-to-OFF

OFF-to-LOW

output

HIGH-to-OFF

OFF-to-HIGH

nOE input

VI

VOL

VOH

3.5 V

VM

GND

tPZL

tPZH

VM

a. Input pulse definition

b. Test circuit

Test data is given in Table 8.

Test circuit definitions:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

VEXT = Test voltage for switching times.

Fig 8.

Load circuitry for switching times

001aai298

VM

tW

10 %

90 %

0 V

VI

negative

pulse

positive

pulse

0 V

VM

90 %

10 %

90 %

10 %

tf

tr

tf

VEXT

VCC

VI

VO

mna616

DUT

CL

RT

RL

G

Table 8.

Test data

Input

Load

VEXT

VI

fI

tW

tr, tf

CL

RL

tPHL, tPLH

tPZH, tPHZ

tPZL, tPLZ

3.0 V

1 MHz

500 ns

≤ 2.5 ns

50 pF

500

Ω

open

7.0 V

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