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AD5641AKSZ-500RL7 Datasheet(PDF) 1 Page - Analog Devices |
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AD5641AKSZ-500RL7 Datasheet(HTML) 1 Page - Analog Devices |
1 / 20 page 2.7 V to 5.5 V, <100 µA, 14-Bit nanoDAC, SPI Interface in LFCSP and SC70 Data Sheet AD5641 Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2005–2012 Analog Devices, Inc. All rights reserved. FEATURES 6-lead LFCSP and SC70 packages Micropower operation: 100 µA maximum at 5 V Power-down to typically 0.2 µA at 3 V Single 14-bit DAC B version: ±4 LSB INL A version: ±16 LSB INL 2.7 V to 5.5 V power supply Guaranteed monotonic by design Power-on reset to 0 V with brownout detection 3 power-down functions Low power serial interface with Schmitt-triggered inputs On-chip output buffer amplifier, rail-to-rail operation SYNC interrupt facility APPLICATIONS Voltage level setting Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators GENERAL DESCRIPTION The AD5641, a member of the nanoDAC® family, is a single, 14-bit, buffered, voltage-out DAC that operates from a single 2.7 V to 5.5 V supply, typically consuming 75 µA at 5 V. The part comes in tiny LFCSP and SC70 packages. Its on-chip precision output amplifier allows rail-to-rail output swing to be achieved. The AD5641 uses a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with SPI®, QSPI™, MICROWIRE™, and DSP interface standards. The reference for AD5641 is derived from the power supply inputs and, therefore, gives the widest dynamic output range. The part incorporates a power-on reset circuit, which ensures that the DAC output powers up to 0 V and remains there until a valid write to the device takes place. The AD5641 contains a power-down feature that reduces current consumption typically to 0.2 µA at 3 V, and provides software-selectable output loads while in power-down mode. The part is put into power-down mode over the serial interface. The low power consumption of the part in normal operation makes it ideally suited to portable battery-operated equipment. The combination of small package and low power makes this nanoDAC device ideal for level-setting requirements such as generating bias or control voltages in space-constrained and power-sensitive applications. FUNCTIONAL BLOCK DIAGRAM AD5641 VDD VOUT GND POWER-ON RESET DAC REGISTER 14-BIT DAC INPUT CONTROL LOGIC POWER-DOWN CONTROL LOGIC OUTPUT BUFFER RESISTOR NETWORK REF(+) SCLK SDIN SYNC Figure 1. Table 1. Related Devices Part Number Description AD5601 2.7 V to 5.5 V, <100 µA, 8-bit nanoDAC, SPI interface in LFCSP and SC70 packages AD5611 2.7 V to 5.5 V, <100 µA, 10-bit nanoDAC, SPI interface in LFCSP and SC70 packages AD5621 2.7 V to 5.5 V, <100 µA, 12-bit nanoDAC, SPI interface in LFCSP and SC70 packages PRODUCT HIGHLIGHTS 1. Available in space-saving 6-lead LFCSP and SC70 packages. 2. Low power, single-supply operation. The AD5641 operates from a single 2.7 V to 5.5 V supply and with a maximum current consumption of 100 µA, making it ideal for battery-powered applications. 3. The on-chip output buffer amplifier allows the output of the DAC to swing rail-to-rail with a typical slew rate of 0.5 V/µs. 4. Reference derived from the power supply. 5. High speed serial interface with clock speeds up to 30 MHz. Designed for very low power consumption. The interface powers up only during a write cycle. 6. Power-down capability. When powered down, the DAC typically consumes 0.2 µA at 3 V. 7. Power-on reset with brownout detection. |
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