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ML2035CP Datasheet(PDF) 5 Page - Fairchild Semiconductor

No. de pieza ML2035CP
Descripción Electrónicos  Serial Input Programmable Sine Wave Generator
Download  9 Pages
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Fabricante Electrónico  FAIRCHILD [Fairchild Semiconductor]
Página de inicio  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

ML2035CP Datasheet(HTML) 5 Page - Fairchild Semiconductor

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ML2035
REV. 1.0 10/10/2000
5
FUNCTIONAL DESCRIPTION
The ML2035 is composed of a programmable frequency
generator, a sine wave generator, a crystal oscillator, and a
serial digital interface. The ML2035 frequency and sine
wave generator functional block diagram is shown in
Figure 3.
PROGRAMMABLE FREQUENCY GENERATOR
The programmable frequency generator produces a digital
output whose frequency is determined by a 16-bit digital
word.
The frequency generator is composed of a phase
accumulator which is clocked at fCLK IN/4. The value
stored in the data latch is added to the phase accumulator
every 4 cycles of CLK IN. The frequency of the analog
output is equal to the rate at which the accumulator
overflows and is given by the equation:
(1)
The frequency resolution and the minimum frequency are
the same and is given by the following equation:
(2)
When fCLK IN = 12.352MHz, ∆fMIN = 1.5Hz (±0.75Hz).
Lower frequencies are obtained by using a lower input
clock frequency.
Due to the phase quantization nature of the frequency
generator, spurious tones can be present in the output
range of –55dB relative to fundamental. The energy from
these tones is included in the signal to noise + distortion
specification. The frequency of these tones can be very
close to the fundamental. Therefore, it is not practical to
filter them out.
SINEWAVE GENERATOR
The sinewave generator is composed of a sine look-up
table, a DAC, and an output smoothing filter. The sine
look-up table is addressed by the phase accumulator. The
DAC is driven by the output of the look-up table and
generates a staircase representation of a sine wave.
The output filter smoothes the analog output by removing
the high frequency sampling components. The resultant
voltage on VOUT is a sinusoid with the second and third
harmonic distortion components at least 45dB below the
fundamental.
The ML2035 provides a peak sinewave voltage of
±VCC/2,
referenced to GND.
The analog section is designed to operate over a range
from DC to 25kHz. Due to slew rate limitations, the peak-
to-peak output voltage must be limited to VOUT(P-P)
(125kV x Hz)/fOUT. Since the ML2035 peak-to-peak
output voltage is equal to VCC, the maximum output
frequency must be limited to 25kHz for VCC = 5V. VOUT
can drive a 1k
Ω, 100pF loads, provided the slew rate
limitations mentioned above are not exceeded.
The output offset voltage, VOS, is a function of the peak-
to-peak output voltage and is specified as:
(3)
For example, if VOUT(P-P) = 2.5V:
CRYSTAL OSCILLATOR
The crystal oscillator generates an accurate reference
clock for the programmable frequency generator. The
internal clock can be generated with a crystal or external
clock.
If a crystal is used, it must be placed between CLK IN and
GND of the ML2035. An on-chip crystal oscillator will
then generate the internal clock. No other external
capacitors or components are required. The crystal should
be a parallel-resonant type with a frequency between
3MHz to 12.4MHz. It should be placed physically as
close as possible to the CLK IN and GND.
An external clock can drive CLK IN directly if desired. The
frequency of this clock can be anywhere between 0 and
12MHz.
The crystal must have the following characteristics:
1. Parallel resonant type
2. Frequency: 3MHz to 12.4MHz
3. Maximum equivalent series resistance of 15
Ω at a drive
levels of 1
µW to 200µW, and 30Ω at drive levels of
10nW to 1
µW
4. Typical load capacitance: 18pF
5. Maximum case capacitance: 7pF
The frequency of oscillation will be a function of the
crystal parameters and PC board capacitance. Crystals that
meet these requirements at 12.352000MHz are M-tron
3709-010 12.352 for 0ºC to 70ºC and 3709-020 12.352
for -40ºC to 85ºC operation.
f
fCLKIN × (D15–D0)DEC
OUT =
2
23
f
f
MIN
CLKIN
2
22
=


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