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ML4812CP Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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ML4812CP Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 16 page April 1998 ML4812 Power Factor Controller GENERAL DESCRIPTION The ML4812 is designed to optimally facilitate a peak current control boost type power factor correction system. Special care has been taken in the design of the ML4812 to increase system noise immunity. The circuit includes a precision reference, gain modulator, error amplifier, over- voltage protection, ramp compensation, as well as a high current output. In addition, start-up is simplified by an under-voltage lockout circuit with 6V hysteresis. In a typical application, the ML4812 functions as a current mode regulator. The current which is necessary to terminate the cycle is a product of the sinusoidal line voltage times the output of the error amplifier which is regulating the output DC voltage. Ramp compensation is programmable with an external resistor, to provide stable operation when the duty cycle exceeds 50%. BLOCK DIAGRAM (Pin Configuration Shown is for DIP Version) FEATURES s Precision buffered 5V reference ( ±0.5%) s Current-input gain modulator reduces external components and improves noise immunity s Programmable ramp compensation circuit s 1A peak current totem-pole output drive s Overvoltage comparator helps prevent output voltage “runaway” s Wide common mode range in current sense comparators for better noise immunity s Large oscillator amplitude for better noise immunity 5V OVP ISENSE GM OUT EA OUT ISINE RAMP COMP CT RT ERROR AMP IEA OSC 1k Ω UNDER VOLTAGE LOCKOUT SHDN OUT PWR GND VREF VCC GND CLOCK VCC EA– 32V 5 1 2 10 12 11 14 13 15 9 3 4 6 7 16 8 + – 5V + – 5V + – – 5V S R Q Q GAIN MODULATOR REV. 1.0 10/10/2000 |
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