Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

SI5315B-C-GM Datasheet(PDF) 9 Page - Silicon Laboratories

No. de pieza SI5315B-C-GM
Descripción Electrónicos  Provides jitter attenuation and frequency translation between SONET/PDH and Ethemet
Download  54 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  SILABS [Silicon Laboratories]
Página de inicio  http://www.silabs.com
Logo SILABS - Silicon Laboratories

SI5315B-C-GM Datasheet(HTML) 9 Page - Silicon Laboratories

Back Button SI5315B-C-GM Datasheet HTML 5Page - Silicon Laboratories SI5315B-C-GM Datasheet HTML 6Page - Silicon Laboratories SI5315B-C-GM Datasheet HTML 7Page - Silicon Laboratories SI5315B-C-GM Datasheet HTML 8Page - Silicon Laboratories SI5315B-C-GM Datasheet HTML 9Page - Silicon Laboratories SI5315B-C-GM Datasheet HTML 10Page - Silicon Laboratories SI5315B-C-GM Datasheet HTML 11Page - Silicon Laboratories SI5315B-C-GM Datasheet HTML 12Page - Silicon Laboratories SI5315B-C-GM Datasheet HTML 13Page - Silicon Laboratories Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 54 page
background image
Si5315
Rev. 1.0
9
LVCMOS Output Pins
Rise/Fall Times
tRF
CLOAD = 20 pf
See Figure 2
—25
ns
LOSn Trigger Window
LOSTRIG
From last CKINn
 to
internal detection of LOSn
——
750
µs
Time to Clear LOL after LOS
Cleared
tCLRLOL
LOS to  LOL
Assume Fold=Fnew,
Stable XA-XB reference
—10
ms
PLL Performance
Output Clock Skew
tSKEW
of CKOUTn to CKOUTn
100
ps
Phase Change Due to
Temperature Variation
tTEMP
Maximum phase change from
–40 to +85 °C
300
500
ps
Lock Time
tLOCKHW RST with valid CKIN to LOL;
BW = 100 Hz
1200
ms
Closed Loop Jitter Peaking
JPK
—0.05
0.1
dB
Jitter Tolerance
JTOL
See 4.2.3. "Jitter Toler-
ance" on page 18.
ns pk-
pk
Minimum Reset Pulse Width
tRSTMIN
1—
µs
Output Clock Initial Phase Step
tP_STEP
During clock switch CKIN > 19.44
MHz
100
200
ps
Holdover Frequency Historical
Averaging Time
tHISTAVG
—6.7
sec
Holdover Frequency Historical
Delay Time
tHISTDEL
—26.2
ms
Spurious Noise
SPSPUR
Max spur @ n x f3
(n > 1, n x f3 < 100 MHz)
—–75
dBc
Table 3. AC Characteristics (Continued)
(VDD = 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%, TA = –40 to 85 ºC)
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Notes:
1. Assumes N3 does not equal 1. IF N3 = 1, CKNDC = 50 µs.
2. Refers to Si5315A speed grade.
3. Refers to Si5315B speed grade.


Número de pieza similar - SI5315B-C-GM

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Silicon Laboratories
SI5315B-C-GM SILABS-SI5315B-C-GM Datasheet
416Kb / 54P
   SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER
logo
Skyworks Solutions Inc.
SI5315B-C-GM SKYWORKS-SI5315B-C-GM Datasheet
1Mb / 54P
   SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER
Rev. 1.0
More results

Descripción similar - SI5315B-C-GM

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Integrated Device Techn...
IDT8V19N486-02I IDT-IDT8V19N486-02I Datasheet
234Kb / 3P
   Jitter attenuation and frequency multiplication
logo
NIHON DEMPA KOGYO
NW50M50LA NDK-NW50M50LA Datasheet
87Kb / 1P
   Frequency Timing and Translation Modules
logo
Micrel Semiconductor
SM844256 MICREL-SM844256 Datasheet
246Kb / 8P
   10 Gigabit Ethernet and SONET, 6 Output, Ultra-Low Jitter LVDS Frequency Synthesizer
SM843256 MICREL-SM843256 Datasheet
238Kb / 8P
   10 Gigabit Ethernet and SONET, 6 output, Ultra-Low Jitter LVPECL Frequency Synthesizer
logo
Abracon Corporation
ASTMUPLD ABRACON-ASTMUPLD Datasheet
2Mb / 6P
   Any frequency between 1MHz and 625MHz
05/15/2017
logo
Zarlink Semiconductor I...
ZL30106 ZARLINK-ZL30106_05 Datasheet
1Mb / 48P
   SONET/SDH/PDH Network Interface DPLL
ZL30106 ZARLINK-ZL30106 Datasheet
423Kb / 48P
   SONET/SDH/PDH Network Interface DPLL
logo
Diodes Incorporated
DMN61D8LVTQ DIODES-DMN61D8LVTQ Datasheet
350Kb / 7P
   Provides a reliable and robust interface between sensitive logic and DC relay coils
logo
Exar Corporation
XRT86SH328 EXAR-XRT86SH328_2 Datasheet
1Mb / 159P
   SONET TO 28-T1/21-E1 PDH MAPPER - VOYAGER PIN AND ARCHITECTURE DESC
logo
Zilog, Inc.
Z84C2006VEC ZILOG-Z84C2006VEC Datasheet
1Mb / 16P
   Provides a direct interface between Z80 microcomputer systems and peripheral devices
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54


Datasheet Descarga

Go To PDF Page


Enlace URL




Política de Privacidad
ALLDATASHEET.ES
¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com