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2467XS–AVR–06/11

ATmega128

In ATmega103 compatibility mode, these pins only serves as strobes signals to the external

memory as well as input to the 32kHz Oscillator, and the pins are initialized to PG0 = 1, PG1 = 1,

and PG2 = 0 asynchronously when a reset condition becomes active, even if the clock is not

running. PG3 and PG4 are oscillator pins.

RESET

Reset input. A low level on this pin for longer than the minimum pulse length will generate a

XTAL1

Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.

XTAL2

Output from the inverting Oscillator amplifier.

AVCC

AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally con-

nected to V

through a low-pass filter.

AREF

AREF is the analog reference pin for the A/D Converter.

PEN

PEN is a programming enable pin for the SPI Serial Programming mode, and is internally pulled

high . By holding this pin low during a Power-on Reset, the device will enter the SPI Serial Pro-

gramming mode. PEN has no function during normal operation.