SN54LV14, SN74LV14

HEX SCHMITT-TRIGGER INVERTERS

SCLS187C – FEBRUARY 1993 – REVISED FEBRUARY 1998

2

POST OFFICE BOX 655303

1

1A

1Y

2

3

2A

2Y

4

5

3A

3Y

6

9

4A

4Y

8

11

5A

5Y

10

13

6A

6Y

12

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.

Pin numbers shown are for the D, DB, J, PW, and W packages.

logic diagram (positive logic)

Y

A

–0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±20 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±25 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance,

127

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DB package

158

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package

170

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65

°C to 150°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stressratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. This value is limited to 7 V maximum.

3. The package thermal impedance is calculated in accordance with JESD 51.

recommended operating conditions (see Note 4)

SN54LV14

SN74LV14

UNIT

MIN

MAX

MIN

MAX

UNIT

VCC

Supply voltage

2.7

5.5

2.7

5.5

V

VIH

High level input voltage

VCC = 2.7 V to 3.6 V

2.4

2.4

V

VIH

High-level input voltage

VCC = 4.5 V to 5.5 V

3.55

3.55

V

VIL

Low level input voltage

VCC = 2.7 V to 3.6 V

0.4

0.4

V

VIL

Low-level input voltage

VCC = 4.5 V to 5.5 V

1.25

1.25

V

VI

Input voltage

0

VCC

0

VCC

V

VO

Output voltage

0

VCC

0

VCC

V

IOH

High level output current

VCC = 2.7 V to 3.6 V

–6

–6

mA

IOH

High-level output current

VCC = 4.5 V to 5.5 V

–12

–12

mA

IOL

Low level output current

VCC = 2.7 V to 3.6 V

6

6

mA

IOL

Low-level output current

VCC = 4.5 V to 5.5 V

12

12

mA

TA

Operating free-air temperature

–55

125

–40

85

°C

NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

PRODUCT PREVIEW information concerns products in the formative or

design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.