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ADSP-21479BBCZ-2A Datasheet(PDF) 31 Page - Analog Devices |
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ADSP-21479BBCZ-2A Datasheet(HTML) 31 Page - Analog Devices |
31 / 76 page ADSP-21477/ADSP-21478/ADSP-21479 Rev. C | Page 31 of 76 | July 2013 Core Timer The following timing specification applies to FLAG3 when it is configured as the core timer (TMREXP). Timer PWM_OUT Cycle Timing The following timing specification applies to timer0 and timer1 in PWM_OUT (pulse-width modulation) mode. Timer signals are routed to the DPI_P14–1 pins through the DPI SRU. There- fore, the timing specifications provided below are valid at the DPI_P14–1 pins. Table 24. Core Timer 88-Lead LFCSP Package All Other Packages Unit Parameter Min Max Min Max Switching Characteristic tWCTIM TMREXP Pulse Width 4 × tPCLK – 1.55 4 × tPCLK – 1.2 ns Figure 12. Core Timer FLAG3 (TMREXP) tWCTIM Table 25. Timer PWM_OUT Timing 88-Lead LFCSP Package All Other Packages Unit Parameter Min Max Min Max Switching Characteristic tPWMO Timer Pulse Width Output 2 × tPCLK – 1.65 2 × (231 – 1) × tPCLK 2 × tPCLK – 1.2 2 × (231 – 1) × tPCLK ns Figure 13. Timer PWM_OUT Timing PWM OUTPUTS tPWMO |
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