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CBC-EVAL-09 Datasheet(PDF) 4 Page - Cymbet Corporation

No. de pieza CBC-EVAL-09
Descripción Electrónicos  EnerChip Energy Processor for Energy Harvesting Applications
Download  16 Pages
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Fabricante Electrónico  CYMBET [Cymbet Corporation]
Página de inicio  http://www.cymbet.com
Logo CYMBET - Cymbet Corporation

CBC-EVAL-09 Datasheet(HTML) 4 Page - Cymbet Corporation

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CBC915 EnerChip Energy Processor
©2012 Cymbet Corporation • Tel: +1-763-633-1780 • www.cymbet.com
DS-72-15 Rev F
Page 4 of 16
Parameter
Min
Typ
Max
Unit
Recommended Operating Conditions
Supply voltage VDD
2.5
3.5
3.6
V
Supply voltage VSS
-
0
-
V
Operating temperature - CBC915-ACB
-20
+25
+70
°C
Operating temperature - CBC915-AIB
-40
+25
+85
°C
Absolute Maximum Ratings
Voltage applied at VDD to VSS
-0.3
-
4.1
V
Voltage applied to any pin
-0.3
-
VDD+0.3
V
Diode current at any device terminal
-2
-
-2
mA
Storage temperature range
-55
-
+105
°C
Notes:
1. Thermal or electrical stresses beyond those listed under absolute maximum ratings may cause permanent damage
to the CBC915. These are stress ratings only, and functional operation of the device at these or any other conditions
beyond those indicated under recommended operating conditions is not implied. Exposure to absolute maximum rated
conditions for extended periods my affect device reliability.
EnerChip Energy Processor CBC915 Operating and Maximum Parameters
EnerChip Energy Processor CBC915 I/O Pin Characterization
Parameter
Conditions
VDD
Min
Typ
Max
Unit
Positive-going input threshold voltage
3.5
1.59
-
2.63
V
Negative-going input threshold
voltage
3.5
0.88
-
1.91
V
Input voltage hysteresis
3.5
0.36
-
-
V
Pullup/Pulldown resistor
for pullup, VIN=VSS
for pulldown, VIN=VDD
20
35
50
kΩ
Input Capacitance
VIN=VSS or VDD
-
5
-
pF
High impedance leakage current
See notes 1 and 2
3.5
-
-
+/- 50
nA
VOH - High level output voltage
100uA
3.5
VDD-0.25 - VDD-0.1
V
VOL - Low level output voltage
100uA
3.5
VSS
-
VSS+0.1
V
Internal clock frequency tolerance
25 °C
0 to 80 °C
N/A
-
+/- 1%
-
-
+/- 2.5%
-
MHz
Notes:
1. The leakage current is measured with VDD or VSS applied to the corresponding pin(s) unless otherwise noted.
2. The leakage of the I/O pins is measured individually. The I/O pin is selected for input and the pullup/pulldown resistor
is disabled. All inputs except STATUS SW/ and CALIBRATE/ are high impedance inputs.


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