Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
AD7892BRZ-1 Datasheet(PDF) 7 Page - Analog Devices |
|
AD7892BRZ-1 Datasheet(HTML) 7 Page - Analog Devices |
7 / 14 page AD7892 REV. C –7– Pin No. Mnemonic Description 16 DB4/SCLK Data Bit 4/Serial Clock. When the device is in its parallel mode, this pin is Data Bit 4, a three-state TTL-compatible output. When the device is in its serial mode, this becomes the serial clock pin, SCLK. SCLK is an input and an external serial clock must be provided at this pin to obtain serial data from the AD7892. Serial data is clocked out from the output shift register on the rising edges of SCLK after RFS goes low. 17 DB3/ RFS Data Bit 3/Receive Frame Synchronization. When the device is in its parallel mode, this pin is Data Bit 3, a three-state TTL-compatible output. When the device is in its serial mode, this becomes the receive frame synchronization input with RFS provided externally to obtain serial data from the AD7892. 18 DB2 Data Bit 2. Three-state TTL-compatible output. This output should be left unconnected when the device is in its serial mode. 19 DB1 Data Bit 1. Three-state TTL-compatible output. This output should be left unconnected when the device is in its serial mode. 20 DB0 Data Bit 0 (LSB). Three-state TTL-compatible output. Output coding is two’s complement for AD7892-1 and AD7892-3 and straight (natural) binary for AD7892-2. This output should be left unconnected when the device is in its serial mode. 21 RD Read. Active low logic input which is used in conjunction with CS low to enable the data outputs. 22 CS Chip Select. Active low logic input which is used in conjunction with RD to enable the data outputs. 23 EOC End-of-Conversion. Active low logic output indicating converter status. The end of conversion is signified by a low going pulse on this line. The duration of this EOC pulse is nominally 100 ns. 24 CONVST Convert Start. Logic Input. A low-to-high transition on this input puts the track/hold into its hold mode and starts conversion. PIN CONFIGURATION DIP and SOIC VDD REF OUT/REF IN AGND MODE DB0 (LSB) DB1 DB2 VIN2 VIN1 DB11/LOW DB3/ RFS DB10/LOW DB4/SCLK DB9 DB5/SDATA DB8 DGND DB7 DB6 14 1 2 24 23 5 6 7 20 19 18 3 4 22 21 817 916 10 15 11 TOP VIEW (Not to Scale) 11 12 13 AD7892 STANDBY CONVST EOC CS RD |
Número de pieza similar - AD7892BRZ-1 |
|
Descripción similar - AD7892BRZ-1 |
|
|
Enlace URL |
Política de Privacidad |
ALLDATASHEET.ES |
¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |