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ADRF6702ACPZ Datasheet(PDF) 1 Page - Analog Devices

No. de pieza ADRF6702ACPZ
Descripción Electrónicos  1200 MHz to 2400 MHz Quadrature Modulator with 1550 MHz to 2150 MHz Frac-N PL
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ADRF6702ACPZ Datasheet(HTML) 1 Page - Analog Devices

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1200 MHz to 2400 MHz Quadrature Modulator with
1550 MHz to 2150 MHz Frac-N PLL and Integrated VCO
Data Sheet
ADRF6702
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
FEATURES
IQ modulator with integrated fractional-N PLL
Output frequency range: 1200 MHz to 2400 MHz
Internal LO frequency range: 1550 MHz to 2150 MHz
Output P1dB: 13.1 dBm @ 2140 MHz
Output IP3: 29.1 dBm @ 2140 MHz
Noise floor: −159.6 dBm/Hz @ 1960 MHz
Baseband bandwidth: 750 MHz (3 dB)
SPI serial interface for PLL programming
Integrated LDOs and LO buffer
Power supply: 5 V/240 mA
40-lead 6 mm × 6 mm LFCSP
APPLICATIONS
Cellular communications systems
GSM/EDGE, CDMA2000, W-CDMA, TD-SCDMA, LTE
Broadband wireless access systems
Satellite modems
GENERAL DESCRIPTION
The ADRF6702 provides a quadrature modulator and
synthesizer solution within a small 6 mm × 6 mm footprint
while requiring minimal external components.
The ADRF6702 is designed for RF outputs from 1200 MHz to
2400 MHz. The low phase noise VCO and high performance
quadrature modulator make the ADRF6702 suitable for next
generation communication systems requiring high signal
dynamic range and linearity. The integration of the IQ
modulator, PLL, and VCO provides for significant board
savings and reduces the BOM and design complexity.
The integrated fractional-N PLL/synthesizer generates a 2× fLO
input to the IQ modulator. The phase detector together with an
external loop filter is used to control the VCO output. The VCO
output is applied to a quadrature divider. To reduce spurious
components, a sigma-delta (Σ-Δ) modulator controls the
programmable PLL divider.
The IQ modulator has wideband differential I and Q inputs,
which support baseband as well as complex IF architectures.
The single-ended modulator output is designed to drive a
50 Ω load impedance and can be disabled.
The ADRF6702 is fabricated using an advanced silicon-
germanium BiCMOS process. It is available in a 40-lead,
exposed-paddle, Pb-free, 6 mm × 6 mm LFCSP package.
Performance is specified from −40°C to +85°C. A lead-free
evaluation board is available.
Table 1.
Part No.
Internal LO Range
±3 dB RFOUT Balun Range
ADRF6701
750 MHz
400 MHz
1150 MHz
1250 MHz
ADRF6702
1550 MHz
1200 MHz
2150 MHz
2400 MHz
ADRF6703
2100 MHz
1550 MHz
2600 MHz
2650 MHz
ADRF6704
2500 MHz
2050 MHz
290 MHz
3000 MHz
FUNCTIONAL BLOCK DIAGRAM
MUX
RSET
CP VTUNE
LOSEL
LON
LOP
QN
2:1
MUX
VCO
CORE
QP
TEMP
SENSOR
DECL3
DECL2
DECL1
ENOP
BUFFER
BUFFER
RFOUT
NC
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
+
CHARGE PUMP
250µA,
500µA (DEFAULT),
750µA,
1000µA
PRESCALER
÷2
LE
CLK
SPI
INTERFACE
DATA
MUXOUT
÷2
0/90
REFIN
GND
ADRF6702
29
VCC7
34
26
16
39
3
5
4
8
6
14
13
12
38
37
36
7 11 15 20 21 23
24
25 28 30 31 35
2
9
40
IP
IN
27
17
10
1
22
PHASE
FREQUENCY
DETECTOR
THIRD-ORDER
FRACTIONAL
INTERPOLATOR
FRACTION
REG
MODULUS INTEGER
REG
N COUNTER
21 TO 123
×2
÷2
÷4
DIVIDER
÷2
18
19
32
33
Figure 1.


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