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CDC536DBRG4 Datasheet(PDF) 8 Page - Texas Instruments

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No. de pieza CDC536DBRG4
Descripción Electrónicos  3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS
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CDC536DBRG4 Datasheet(HTML) 8 Page - Texas Instruments

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tphase error 10
tphase error 11
tphase error 12
tphase error 15
CLKIN
Outputs
Operating
at CLKIN
Frequency
Outputs
Operating
at 2
× CLKIN
Frequency
tphase error 13
tphase error 14
CDC536
SCAS378G – APRIL 1994 – REVISED JULY 2004
PARAMETER MEASUREMENT INFORMATION (continued)
A.
NOTES: . Output skew, tsk(o), is calculated as the greater of:
The difference between the fastest and slowest of tphase error n (n = 10, 11, . . . 15)
B.
Process skew, tsk(pr), is calculated as the greater of:
The difference between the maximum and minimum tphase error n (n = 10, 11, . . . 15) across multiple devices
under identical operating conditions.
Figure 3. Waveforms for Calculation of tsk(o) and tsk(pr)
8


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