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TPS2115PWG4 Datasheet(PDF) 7 Page - Texas Instruments |
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TPS2115PWG4 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 22 page www.ti.com FUNCTIONAL BLOCK DIAGRAM Q2 is ON 1 STAT Control Logic D1 D0 UVLO (IN1) UVLO (IN2) UVLO (VDD) Q2 is ON Q1 is ON _ + _ + + 0.6 V EN2 EN1 Cross-Conduction Detector _ + Q2 Q1 Charge Pump 0.5 V TPS2114: k = 0.2% TPS2115: k = 0.1% k* IO(OUT) _ + VO(OUT) > VI(INx) + 100 mV _ + IO(OUT) Vf = 0 V EN1 IN2 IN1 7 4 OUT ILIM Internal VDD Vf = 0 V VDD ULVO Thermal Sense 1 µA IN2 ULVO 1 µA IN1 ULVO 8 6 2 3 5 IN1 IN2 D0 D1 GND TPS2114 TPS2115 SLVS447A – DECEMBER 2002 – REVISED MARCH 2004 Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. D0 2 I TTL and CMOS compatible input pins. Each pin has a 1-µA pullup resistor. The truth table shown above illustrates the functionality of D0 and D1. D1 3 I GND 5 I Ground IN1 8 I Primary power switch input. The IN1 switch can be enabled only if the IN1 supply is above the UVLO threshold and at least one supply exceeds the internal VDD UVLO. IN2 6 I Secondary power switch input. The IN2 switch can be enabled only if the IN2 supply is above the UVLO threshold and at least one supply exceeds the internal VDD UVLO. ILIM 4 I A resistor R(ILIM) from ILIM to GND sets the current limit IL to 250/R(ILIM) and 500/R(ILIM) for the TPS2114 and TPS2115, respectively. OUT 7 O Power switch output STAT 1 O STAT is an open-drain output that is Hi-Z if the IN2 switch is ON. STAT pulls low if the IN1 switch is ON or if OUT is Hi-Z (i.e., EN is equal to logic 0). 7 |
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