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MC10LVEL40DWR2 Datasheet(PDF) 2 Page - ON Semiconductor |
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MC10LVEL40DWR2 Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 6 page MC100LVEL40 http://onsemi.com 2 Figure 1. 20−Lead Pinout (Top View) 19 20 18 17 16 15 14 2 1 34567 NC 13 8 12 9 11 10 VCCO UU VEE DD VCCO NC NC NC NC R R VBB FB FB VCC NC NC Figure 2. Logic Diagram PIN FUNCTION U, U ECL Up Differential Outputs D, D ECL Down Differential Outputs FB, FB ECL Feedback Differential Inputs R, R ECL Reference Differential Inputs VBB Reference Voltage Output VCC, VCCO Positive Supply VEE Negative Supply NC No Connect Table 1. PIN DESCRIPTION Warning: All VCC, VCCO, and VEE pins must be externally connected to Power Supply to guarantee proper operation. R VBB FB FB SQ R SQ R RU U D D VEE Table 2. ATTRIBUTES Characteristics Value ESD Protection Human Body Model > 2 kV Moisture Sensitivity (Note 1) Pb Pkg Pb−Free Pkg SOIC−20 Level 1 Level 3 Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Transistor Count 356 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. |
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