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LMZ35003RKGR Datasheet(PDF) 3 Page - Texas Instruments

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No. de pieza LMZ35003RKGR
Descripción Electrónicos  2.5A SIMPLE SWITCHER짰 Power Module with 7V-50V Input in QFN Package
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI1 - Texas Instruments

LMZ35003RKGR Datasheet(HTML) 3 Page - Texas Instruments

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LMZ35003
www.ti.com
SNVS988 – JULY 2013
ELECTRICAL CHARACTERISTICS
-40°C
≤ TA ≤ +85°C, VIN = 24 V, VOUT = 5.0 V, IOUT = 2.5 A, RT = Open
CIN = 2 x 2.2 µF ceramic, COUT = 2 x 47 µF ceramic (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IOUT
Output current
Over input voltage and output voltage range
0
2.5
A
VIN
Input voltage range
Over output current range
7.0(1)
50(2)
V
UVLO
VIN Undervoltage lockout
No hysteresis, Rising and Falling
2.5
V
VOUT(adj)
Output voltage adjust range
Over output current range
2.5(3)
15
V
Set-point voltage tolerance
TA = 25°C; IOUT = 100 mA
±2.0% (4)
Temperature variation
-40°C
≤ TA ≤ +85°C
±0.5%
±1.0%
VOUT
Line regulation
Over input voltage range
±0.1%
Load regulation
Over output current range
±0.4%
Total output voltage variation
Includes set-point, line, load, and temperature variation
±3.0% (4)
VOUT = 12 V, fSW = 800 kHz
93 %
VIN = 24 V
VOUT = 5.0 V, fSW = 500 kHz
84 %
IOUT = 1.5 A
VOUT = 3.3 V, fSW = 400 kHz
79 %
η
Efficiency
VIN = 48 V
VOUT = 12 V, fSW = 800 kHz
87 %
IOUT = 1.5 A
VOUT = 5.0 V, fSW = 500 kHz
79 %
VOUT = 3.3 V, fSW = 400 kHz
74 %
Output voltage ripple
20 MHz bandwith, 0.25 A
≤ IOUT ≤ 2.5 A, VOUT ≥ 3.3V
1% (3)
VOUT
ILIM
Current limit threshold
5.1
A
Recovery time
400
µs
1.0 A/µs load step from 50 to 100%
Transient response
VOUT
IOUT(max)
90
mV
over/undershoot
VINH
Inhibit threshold voltage
No hysteresis
1.15
1.25
1.36 (5)
V
VINH < 1.15 V
-0.9
μA
IINH
INH Input current
VINH > 1.36 V
-3.8
μA
II(stby)
Input standby current
INH pin to AGND
1.3
4
µA
Good
94%
VOUT rising
Fault
109%
PWRGD Thresholds
Power Good
Fault
91%
VOUT falling
Good
106%
PWRGD Low Voltage
I(PWRGD) = 3.5 mA
0.2
V
fSW
Switching frequency
RT/CLK pin OPEN
300
400
500
kHz
fCLK
Synchronization frequency
300
1000
kHz
VCLK-H
CLK High-Level Threshold
1.9
2.2
V
CLK Control
VCLK-L
CLK Low-Level Threshold
0.5
0.7
V
DCLK
CLK Duty cycle
25%
50%
75%
Thermal shutdown
180
°C
Thermal Shutdown
Thermal shutdown hysteresis
15
°C
Ceramic
4.4 (6)
10
CIN
External input capacitance
µF
Non-ceramic
22
COUT
External output capacitance
100 (7)
430
µF
(1)
For output voltages
≤ 12 V, the minimum input voltage is 7 V or (VOUT+ 3 V), whichever is greater. For output voltages > 12 V, the
minimum input voltage is (1.33 x VOUT). See Figure 27 for more details.
(2)
The maximum input voltage is 50 V or (15 x VOUT), whichever is less.
(3)
Output voltages < 3.3 V are subject to reduced VIN(max) specifications and higher ripple magnitudes.
(4)
The stated limit of the set-point voltage tolerance includes the tolerance of both the internal voltage reference and the internal
adjustment resistor. The overall output voltage tolerance is affected by the tolerance of the external RSET resistor.
(5)
Value when no voltage divider is present at the INH/UVLO pin.
(6)
A minimum of 4.4µF of ceramic external capacitance is required across the input (VIN and PGND connected) for proper operation.
Locate the capacitor close to the device. See Table 1 for more details.
(7)
The required capacitance must include at least 2 x 47µF ceramic capacitors (or 4 x 22µF). Locate the capacitance close to the device.
Adding additional capacitance close to the load improves the response of the regulator to load transients. See Table 1 for more details.
Copyright © 2013, Texas Instruments Incorporated
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