Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
AD7303BNZ Datasheet(PDF) 9 Page - Analog Devices |
|
AD7303BNZ Datasheet(HTML) 9 Page - Analog Devices |
9 / 16 page AD7303 –9– REV. 0 grammed to transfer data in 16-bit words. After clocking all six- teen bits to the shift register, the rising edge of SYNC executes the programmed function. The DACs are double buffered which allows their outputs to be simultaneously updated. INPUT SHIFT REGISTER DESCRIPTION The input shift register is 16 bits wide. The first eight bits con- sist of control bits and the last eight bits are data bits. Figure 23 shows a block diagram of the logic interface on the AD7303 DAC. The seven bits in the control word are taken from the in- put shift register to a latch sequencer that decodes this data and provides output signals that control the data transfers to the in- put and data registers of the selected DAC, as well as output updating and various power-down features associated with the control section. A description of all bits contained in the input shift register is given below. SERIAL INTERFACE The AD7303 contains a versatile 3-wire serial interface that is compatible with SPI, QSPI and Microwire interface stan- dards as well as a host of digital signal processors. An active low SYNC enables the shift register to receive data from the serial data input DIN. Data is clocked into the shift register on the rising edge of the serial clock. The serial clock frequency can be as high as 30 MHz. This shift register is 16 bits wide as shown in Figures 23 and 24. The first eight bits are control bits and the second eight bits are data bits for the DACs. Each transfer must consist of a 16-bit transfer. Data is sent MSB first and can be transmitted in one 16-bit write or two 8-bit writes. SPI and Microwire interfaces output data in 8-bit bytes and thus require two 8-bit transfers. In this case the SYNC input to the DAC should remain low until all sixteen bits have been transferred to the shift register. QSPI interfaces can be pro- DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 INT/EXT CR0 CR1 A/B PDA PDB LDAC X 8 8 LATCH SEQUENCER 7 MSB LSB DAC A POWER-DOWN DAC B POWER-DOWN BANDGAP POWER-DOWN LATCH & CLK DRIVERS 16 REF SELECTOR INT REFERENCE CURRENT SWITCH CLOCK BUS REF RESISTOR SWITCH DAC A BIAS DAC B BIAS DIN SYNC DAC REGISTER 30 DAC A VOUT A 30 8 TO 32 DECODER INPUT REGISTER 8 SYNC SCLK BANDGAP BIAS GEN 8 DAC REGISTER 30 DAC B VOUT B 30 8 TO 32 DECODER INPUT REGISTER 8 Figure 23. Logic Interface on the AD7303 |
Número de pieza similar - AD7303BNZ |
|
Descripción similar - AD7303BNZ |
|
|
Enlace URL |
Política de Privacidad |
ALLDATASHEET.ES |
¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |