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74VHC595PW Datasheet(PDF) 6 Page - NXP Semiconductors

No. de pieza 74VHC595PW
Descripción Electrónicos  8-bit serial-in/serial-out or parallel-out shift register with output latches
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74VHC595PW Datasheet(HTML) 6 Page - NXP Semiconductors

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74VHC_VHCT595
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 4 July 2012
6 of 22
NXP Semiconductors
74VHC595; 74VHCT595
8-bit serial-in/serial-out or parallel-out shift register with output latches
8.
Limiting values
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
For SO16 packages: above 70
C the value of P
tot derates linearly at 8 mW/K.
For TSSOP16 packages: above 60
C the value of P
tot derates linearly at 5.5 mW/K.
For DHVQFN16 packages: above 60
C the value of P
tot derates linearly at 4.5 mW/K.
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
0.5
+7.0
V
VI
input voltage
0.5
+7.0
V
IIK
input clamping current
VI < 0.5 V
[1]
20
-
mA
IOK
output clamping current
VO < 0.5 V or VO >VCC +0.5 V
[1]
20
+20
mA
IO
output current
VO = 0.5 V to (VCC +0.5 V)
25
+25
mA
ICC
supply current
-
+75
mA
IGND
ground current
75
-
mA
Tstg
storage temperature
65
+150
C
Ptot
total power dissipation
Tamb = 40 C to +125 C
[2] -
500
mW


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