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74ALVCH16901DGGRG4 Datasheet(PDF) 8 Page - Texas Instruments |
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74ALVCH16901DGGRG4 Datasheet(HTML) 8 Page - Texas Instruments |
8 / 14 page SN74ALVCH16901 18BIT UNIVERSAL BUS TRANSCEIVER WITH PARITY GENERATORS/CHECKERS SCES010F − JULY 1995 − REVISED SEPTEMBER 2004 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 1.8 V VCC = 2.5 V ± 0.2 V VCC = 2.7 V VCC = 3.3 V ± 0.3 V UNIT PARAMETER (INPUT) (OUTPUT) MIN TYP MIN MAX MIN MAX MIN MAX UNIT fmax † 125 125 125 MHz A or B B or A † 1 5.2 4.8 1 4.4 A or B BPAR or APAR † 2 8.9 7.6 2 6.7 APAR or BPAR BPAR or APAR † 1 5.7 5.2 1 4.7 APAR or BPAR ERRA or ERRB † 2 9.7 8.7 2 7.5 ODD/EVEN ERRA or ERRB † 1.5 8.7 7.9 1.5 6.8 ODD/EVEN BPAR or APAR † 1.5 8.3 7.6 1.5 6.5 SEL BPAR or APAR † 1 6.1 5.9 1 5.1 A or B † 1 6.4 5.8 1 5.1 tpd CLKAB or CLKBA BPAR or APAR parity feed through † 1.5 7.1 6.3 1.5 5.6 ns pd CLKAB or CLKBA BPAR or APAR parity generated † 2.5 10.2 8.7 2 7.7 ERRA or ERRB † 2.5 10.5 8.9 2 7.9 A or B † 1 6 5.5 1 4.8 LEAB or LEBA BPAR or APAR parity feed through † 1.5 6.7 6 1.5 5.3 LEAB or LEBA BPAR or APAR parity generated † 2.5 9.8 8.3 2 7.4 ERRA or ERRB † 2.5 9.9 8.5 2 7.5 ten OEAB or OEBA B, BPAR or A, APAR † 1.4 6.3 6.1 1 5.3 ns tdis OEAB or OEBA B, BPAR or A, APAR † 1.3 6.1 5.2 1.5 4.9 ns ten OEAB or OEBA ERRA or ERRB † 1.4 6.2 5.5 1 4.9 ns tdis OEAB or OEBA ERRA or ERRB † 1.3 7.3 6.5 1 5.7 ns ten SEL ERRA or ERRB † 1.4 6.7 6.5 1 5.5 ns tdis SEL ERRA or ERRB † 1.3 6.4 5.4 1.5 4.9 ns † This information was not available at the time of publication. operating characteristics, TA = 25°C PARAMETER TEST CONDITIONS VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V UNIT PARAMETER TEST CONDITIONS TYP TYP TYP UNIT Cpd Power dissipation Outputs enabled CL = 50 pF, f = 10 MHz † 22 27 pF Cpd Power dissipation capacitance Outputs disabled CL = 50 pF, f = 10 MHz † 5 8 pF † This information was not available at the time of publication. |
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