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CAT33C804A Datasheet(PDF) 3 Page - Catalyst Semiconductor |
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CAT33C804A Datasheet(HTML) 3 Page - Catalyst Semiconductor |
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3 / 14 page  Preliminary CAT33C804A 3 Doc. No. 25044-00 2/98 A.C. CHARACTERISTICS VCC = +3V ±10%,unless otherwise specified. Limits Symbol Parameter Min. Typ. Max. Units Test Conditions tCSH CS Hold Time 0 ns CL = 100pF tD CLK to DO Delay 104 µsVIN = VIH or VIL tPD CLK to DO Delay 150 ns VOUT = VOH or VOL tHZ(1) (2) CLK to DO High-Z Delay 50 ns tEW Program/Erase Pulse Width 12 ms tCSL CS Low Pulse Width 100 ns tSV ERR Output Delay 150 ns CL = 100pF tVCCS(1) VCC to CS Setup Time 5 µsCL = 100pF fCLK Clock Frequency DC 4.9152 MHz Note: (1) This parameter is tested initially and after a design or process change that affects the parameter. (2) tHZ is measured from the falling edge of the clock to the time when the output is no longer driven. |
Número de pieza similar - CAT33C804A |
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Descripción similar - CAT33C804A |
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