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SLA7080MPR Datasheet(PDF) 10 Page - Sanken electric |
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SLA7080MPR Datasheet(HTML) 10 Page - Sanken electric |
10 / 18 page 10 SANKEN ELECTRIC CO., LTD. 28610.23, Rev. 1 Unipolar 2-Phase Stepping Motor Driver ICs SLA7080M Series Application Information INA, ¯ I ¯¯ N ¯¯ A ¯, INB, ¯I ¯¯ N ¯¯ B¯, B_SEL, and SYNC pins These inputs operate with CMOS input. The default state is high impedance, and they must be driven to logic high or logic low. When these logic input pins are used, they should be pulled down to the ground side using a 1 to 10 kΩ resistor. Any of these pins that are not used must either be pulled up to the VDD side or be pulled down to the ground side. If they are left open, malfunction or permanent damage to the product may result. For example, in case the signal from the microcomputer has high impedance, a pull-down or pull-up resis- tor should be provided. In particular, when an INx pin is in high impedance during operation, abnormal oscillation of the output may be caused and in the worst case, this will result in permanent damage to the MOSFETs. A low pass filter (LPF) is provided on each the logic input pin. These improve noise filtering. Sleep Mode The SLA7080M can be set into Sleep mode, in which the motor is not controlled, so it can move freely. To enable Sleep mode, set the REF pin at more than 2 V. In Sleep mode, the device stops the main power supply and decreases circuit current. When shifting the device directly from the Sleep mode to the normal operating mode (motor rotation), not only the rise time of the device, but also the rise time of motor excitation current should be considered when determining the amount of time lag from the cancellation of Sleep mode to the next motor phase input command. As shown in figure 8, a minimum lag of 100 μs is recommended. Because of the built-in circuit protection features, be cautious about taking too long when switching between the Motor Cur- rent Setting range and the Sleep Limit range (refer to figure 9). Because the VOCP level occurs in the Prohibited range, between those two areas, if the switching time is too lengthy, overcurrent protection will start operating when VSENSE > VOCP. FLAG pin This is the output for the protection circuit: FLAG Pin Output Logic Low Normal operation High Protection circuit operation It is designed for CMOS output, as shown in the equivalent circuit in figure 10. Therefore, if the FLAG logic pin is not used, it must be left open. Internal Sense Resistors, RS Sense resistors which detect motor currents are incorporated in this product series. The values of the internal sense resistors, RS , can be calculated (for the standard SLA7080M variants listed in this document) by applying the power loss formula: P ≈ IO2 × RS . Figure 9. Reference voltage, VREF, ranges VREF (V) 2.00 Sleep Limit Range Motor Current Setting Range VDD VOCP Detect (Typical) 1.5 A, 3.0 A 2.0 A 1.0 A Prohibited Range 0.70 0.45 0.30 0.04 0.40 Figure 8. External circuit for detecting phase control signals 100 μs (min) REF Phase Command |
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