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ADP1660 Datasheet(PDF) 6 Page - Analog Devices |
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ADP1660 Datasheet(HTML) 6 Page - Analog Devices |
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6 / 28 page  ADP1660 Data Sheet Rev. 0 | Page 6 of 28 ABSOLUTE MAXIMUM RATINGS Table 4. Parameter Rating VIN, SDA, SCL, EN, GPIO, STROBE, LED1, LED2, SW, VOUT to PGND −0.3 V to +6 V PGND to SGND −0.3 V to +0.3 V Ambient Temperature Range (TA) −40°C to +85°C Junction Temperature Range (TJ) −40°C to +125°C Storage Temperature JEDEC J-STD-020 ESD Human Body Model ±1000 V Charged Device Model ±500 V Machine Model ±150 V Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL DATA The ADP1660 may be damaged if the junction temperature (TJ) limits are exceeded. Monitoring ambient temperature (TA) does not guarantee that TJ is within the specified temperature limits. In applications with high power dissipation and poor PCB thermal resistance, the maximum TA may need to be derated. In applications with moderate power dissipation and low PCB thermal resistance, the maximum TA can exceed the maximum limit as long as TJ is within the specification limits. The junction temperature (TJ) of the device is dependent on the ambient temperature (TA), the power dissipation (PD) of the device, and the junction-to-ambient thermal resistance (θJA) of the package. Maximum TJ is calculated from TA and PD using the following formula: TJ = TA + (PD × θJA) THERMAL RESISTANCE The junction-to-ambient thermal resistance (θJA) of the package is based on modeling and calculation using a 4-layer board. θJA is highly dependent on the application and board layout. In applications where high maximum power dissipation exists, close attention to thermal board design is required. The value of θJA may vary, depending on PCB material, layout, and environmental conditions. The specified value of θJA is based on a 4-layer, 4 inch × 3 inch, 2½ oz copper board, per JEDEC standards. For more information, see the AN-617 Application Note, Wafer Level Chip Scale Package. In Table 5, θJA is specified for a device mounted on a JEDEC 2S2P PCB. Table 5. Thermal Resistance Package Type θJA Unit 12-Ball WLCSP 75 °C/W ESD CAUTION |
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