Fig.12c. Maximum avalanche energy vs.

Drain current

SEMICONDUCTOR

Nell High Power Products

RoHS

RoHS

550

440

330

220

110

0

Starting Junction temperature, T (°C)

J

+

-

Fig.13b. Gate charge test circuit

10V

Charge

•

•

•

P.W.

Period

di/dt

Diode Recovery

dv/dt

Ripple ≤ 5%

Body Diode

Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

Driver Gate Drive

Inductor Curent

D =

P.W.

Period

*

+

-

+

+

+

-

-

-

•

•

•

•

Circuit Layout Considerations

Low Stray lnductance

Ground Plane

Low Leakage lnductance

Current Transformer

Driver same type as D.U.T.

l

controlled by Duty Factor D

SD

" "

D.U.T. -Device Under Test

D.U.T.

*V

= 5V for Logic Level Devices and 3V for drive devices

GS

Current Regulator

Same Type as D.U.T.

12V

0.2µF

50KΩ

0.3µF

3mA

D.U.T.

Fig.14 Peak diode recovery dv/dt test circuit for N-Channel MOSFET

Fig.13a. Basic gate charge waveform

Current Sampling Resistors

25

50

75

100

125

150

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IRF3710 Series

175

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