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3-14 OUTPUT PARAMETERS (Differential Input Voltage = 1V) Peak Output Voltage (Terminal 6) With Q13 “ON” VOM+ V+ = 30V, RL = 2kΩ to GND 26 27 - V With Q13 “OFF” VOM- - 0.01 0.05 V Peak Output Voltage (Terminal 6) Positive VOM+ V+ = 15V, V- = -15V, RL = 2kΩ to -15V 11 12 - V Negative VOM- - -14.99 -14.95 V Peak Output Voltage (Terminal 8) With Q13 “OFF” VOM+ V+ = 30V, RL = 2kΩ to 30V 29.95 29.99 - V With Q13 “ON” VOM- - 0.040 - V Peak Output Voltage (Terminal 8) Positive VOM+ V+ = 15V, V- = -15V, RL = 2kΩ to 15V 14.95 14.99 - V Negative VOM- - -14.96 - V Collector-to-Emitter Saturation Voltage (Terminal 8) VCE(SAT) V+ = 30V, IC = 50mA, Terminal 6 Grounded - 0.17 0.80 V Output Leakage Current (Terminal 6 to Terminal 4) V+ = 30V - 2 10 µA Composite Small Signal Current Transfer Ratio (Beta) (Q12 and Q13) hFE V+ = 30V, VCE = 5V, IC = 50mA 16,000 100,000 - Output Capacitance Terminal 6 CO f = 1MHz, All Remaining Terminals Tied to Terminal 4 - 5.5 - pF Terminal 8 - 17 - pF TRANSFER PARAMETERS Voltage Gain A V+ = 30V, IABC = 100µA, ∆VOUT = 20V, RL = 2kΩ 20,000 100,000 - V/V 86 100 - dB Forward Transconductance to Terminal 1 gM 1650 2200 2750 µS Slew Rate (Open Loop) Positive Slope SR IABC = 500µA, RL = 2kΩ - 500 - V/ µs Negative Slope - 50 - V/ µs Unity Gain (Non-Inverting Compensated) IABC = 500µA, RL = 2kΩ - 0.70 - V/ µs Electrical Specifications TA = 25 oC for Equipment Design. Single Supply V+ = 30V, Dual Supply V SUPPLY = ±15V, IABC = 100µA Unless Otherwise Specified (Continued) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Schematic Diagram 6 “SINK” OUTPUT “SOURCE” (DRIVE) Q13 Q12 R1 2k Ω OUTPUT R2 47k Ω Q10 Q11 Q8 Q9 D4 Q7 Q6 D3 2 3 Q4 D2 Q5 Q2 Q1 5 Q3 D6 D5 DIFFERENTIAL VOLTAGE V+ EXTERNAL FREQUENCY COMPENSATION OR INHIBIT INPUT INPUT AMPLIFIER BIAS INPUT IABC D1 DIFFERENTIAL VOLTAGE INPUT V- 4 7 1 8 OUTPUT MODE OUTPUT TERM INPUTS INV NON- INV “Source” 6 2 3 “Sink” 8 3 2 CA3094, CA3094A, CA3094B |
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