Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

AD7725 Datasheet(PDF) 9 Page - Analog Devices

No. de pieza AD7725
Descripción Electrónicos  16-Bit 900 kSPS ADC with a Programmable Postprocessor
Download  28 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

AD7725 Datasheet(HTML) 9 Page - Analog Devices

Back Button AD7725_15 Datasheet HTML 5Page - Analog Devices AD7725_15 Datasheet HTML 6Page - Analog Devices AD7725_15 Datasheet HTML 7Page - Analog Devices AD7725_15 Datasheet HTML 8Page - Analog Devices AD7725_15 Datasheet HTML 9Page - Analog Devices AD7725_15 Datasheet HTML 10Page - Analog Devices AD7725_15 Datasheet HTML 11Page - Analog Devices AD7725_15 Datasheet HTML 12Page - Analog Devices AD7725_15 Datasheet HTML 13Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 28 page
background image
REV. A
AD7725
–9–
PIN CONFIGURATION
3
4
5
6
7
1
2
10
11
8
9
40 39 38
41
42
43
44
36 35 34
37
29
30
31
32
33
27
28
25
26
23
24
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
12 13 14 15 16 17 18 19 20 21 22
SCR/DB13
SMODE0/DB14
SMODE1/DB15
SOE/CS
SYNC
DGND
STBY
AD7725
EFMT/DB2
ERR/DB1
SDI/DB0
CFMT/RS
DVAL/INT
DGND
RD/
WR
S/
P
AGND1
AGND1
AVDD1
AVDD
AGND
UNI
REF2
PIN FUNCTION DESCRIPTIONS
Pin No.
Mnemonic S/P
Description
1
EFMT/DB2
Serial Mode. EFMT–Serial Clock Format, Logic Input. This clock format pin selects
the clock edge to be used during configuration. When EFMT is low, Serial Data In is
valid on the rising edge of SCO; when EFMT is high, Serial Data In is valid
on the falling edge of SCO. During normal operation, this pin is ignored.
Parallel Mode. DB2–Data Input/Output Bit.
2
ERR/DB1
Serial Mode.
ERR–Configuration Error Flag, Logic Output. If an error occurs during
configuration, this output goes low and is reset high by a pulse on the
RESETCFG pin.
Parallel Mode. DB1–Data Input/Output Bit.
3
SDI/DB0
Serial Mode. SDI–Serial Data Input. Serial data is shifted in to the AD7725 MSB first, in
twos complement format, synchronous with SCO.
Parallel Mode. DB0–Data Input/Output Bit (LSB).
4
CFMT/RS
Serial Mode. CFMT–Serial Clock Format, Logic Input. This clock format pin selects the
clock edge to be used during normal operation. When CFMT is low, Serial Data Out is
valid on the rising edge of SCO; when CFMT is high, Serial Data Out is valid on the
falling edge of SCO. During configuration, this pin is ignored.
Parallel Mode. RS–Register Select. RS selects between the data register, used to read
conversion data or write configuration data, and the instruction register. When RS is high,
the status register can be read or an instruction can be written to the AD7725. When RS
is low, data such as the configuration file can be written to the ADC while data such as the
device ID or a conversion result can be read from the AD7725 (see Table I).


Número de pieza similar - AD7725_15

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Analog Devices
AD7725BS AD-AD7725BS Datasheet
442Kb / 28P
   16-Bit 900 kSPS ADC with a Programmable Postprocessor
REV. A
More results

Descripción similar - AD7725_15

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Analog Devices
AD7725 AD-AD7725 Datasheet
442Kb / 28P
   16-Bit 900 kSPS ADC with a Programmable Postprocessor
REV. A
logo
Cirrus Logic
CDB5571-2 CIRRUS-CDB5571-2 Datasheet
689Kb / 26P
   100 kSps, 16-bit ADC
logo
Analog Devices
AD7612 AD-AD7612 Datasheet
818Kb / 32P
   16-Bit, 750 kSPS, Unipolar/Bipolar Programmable Input PulSAR ADC
REV. 0
AD7612 AD-AD7612_17 Datasheet
582Kb / 33P
   16-Bit, 750 kSPS, Unipolar/Bipolar Programmable Input PulSAR ADC
AD7610 AD-AD7610_17 Datasheet
684Kb / 33P
   16-Bit, 250 kSPS, Unipolar/Bipolar Programmable Input PulSAR ADC
AD7610 AD-AD7610 Datasheet
820Kb / 32P
   16-Bit, 250 kSPS, Unipolar/Bipolar Programmable Input PulSAR ADC
REV. 0
AD7660 AD-AD7660 Datasheet
218Kb / 20P
   16-Bit, 100 kSPS CMOS ADC
REV. 0
AD7665 AD-AD7665 Datasheet
348Kb / 24P
   16-Bit, 570 kSPS CMOS ADC
REV. 0
AD1876 AD-AD1876_15 Datasheet
158Kb / 12P
   16-Bit 100 kSPS Sampling ADC
REV. A
AD677 AD-AD677_15 Datasheet
430Kb / 16P
   16-Bit 100 kSPS Sampling ADC
REV. A
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28


Datasheet Descarga

Go To PDF Page


Enlace URL




Política de Privacidad
ALLDATASHEET.ES
¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com