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AD7769 Datasheet(PDF) 2 Page - Analog Devices |
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AD7769 Datasheet(HTML) 2 Page - Analog Devices |
2 / 16 page REV. A –2– AD7769–SPECIFICATIONS ADC SPECIFICATIONS Parameter J Version A Version Units Conditions/Comments DC ACCURACY Resolution 8 * Bits Relative Accuracy ±1 * LSB max See Terminology Differential Nonlinearity ±1 * LSB max No Missing Codes. See Terminology. Bias Offset Error See Terminology +25 °C ±2.5 * LSB max TMIN to TMAX ±3.0 * LSB max Bias Offset Match Channel A to Channel B +25 °C ±2.5 * LSB max TMIN to TMAX ±3.5 * LSB max Plus or Minus Full-Scale Error See Terminology +25 °C ±2.0 * LSB max TMIN to TMAX ±2.5 * LSB max Plus or Minus Full-Scale Match Channel A to Channel B +25 °C ±3.5 * LSB max TMIN to TMAX ±4 * LSB max ADC TO DAC MATCHING Channel A/B to VOUT A/B Bias Offset Match VBIAS (DAC) = +5 V, VSWING (DAC) = +2.5 V. +25 °C ±2.5 * LSB max TMIN to TMAX ±3.5 * LSB max Plus or Minus Full-Scale Match +25 °C ±3.5 * LSB max TMIN to TMAX ±4.0 * LSB max DYNAMIC PERFORMANCE 2 Signal-to-Noise Ratio (SNR) 44 * dB min VIN = 100 kHz Full-Scale Sine Wave with fSAMPLING = 400 kHz Total Harmonic Distortion (THD) 48 * dB max VIN = 100 kHz Full-Scale Sine Wave with fSAMPLlNG = 400 kHz Intermodulation Distortion (IMD) 60 * dB typ fa = 99 kHz, fb = 96.7 kHz with fSAMPLING = 400 kHz Frequency Response 0.1 * dB typ VIN = Full-Scale, dc to 200 kHz Sine Wave ANALOG INPUTS Input Voltage Ranges, VINA, VINBVBIAS – VSWING or 0 V min Whichever Is the Higher VBIAS + VSWING or 9.8 V max Whichever Is the Lower Input Currents, IINA, IINB ±0.4 * mA max ADC REFERENCE INPUTS Input Voltage Levels VBIAS (ADC) 2/6.8 * V min/max With Respect to AGND (ADC). For Specified Performance. VSWING (ADC) 2.0/3.0 * V min/max With Respect to AGND (ADC). For Specified Performance. Input Currents VBIAS (ADC) Input ±800 * µA max VSWING (ADC) Input ±1* µA max LOGIC OUTPUTS DB0–DB7, INT VOL, Output Low Voltage 0.4 * V max ISINK = 1.6 mA VOH, Output High Voltage 4.0 * V min ISOURCE = 200 µA DB0–DB7 Floating State Leakage Current ±10 * µA max Floating State Capacitance 2 10 * pF max Output Coding Offset Binary POWER REQUIREMENTS VCC Range 4.75/5.25 * V min/V max For Specified Performance. The Part Will Function with VCC =5 V ± 10% with Degraded Performance. VDD Range 10.8/13.2 * V min/V max For Specified Performance IDD @ +25°C 20 * mA max For ADC and DAC: VBIAS = 5.0 V; VSWING = 3.0 V; VINA, VUBAm VINB = TMIN to TMAX 22 * mA max VBIAS; DAC Code = FF (Hex); DACA and DACB Load = 5 kΩ to AGND (DAC). Typically IDD = 14 mA. ICC @ +25°C 5 * mA max Logic Inputs = 2.4 V, CLK Input = 0.8 V. Typically ICC = 1.5 mA. TMIN to TMAX 6 * mA max NOTES 1 Temperature range as follows: J Version: 0 °C to +70°C; A Version: –40°C to +85°C. 2 Sample tested at +25 °C to ensure compliance. *Specification same as J Version. Specifications subject to change without notice. (VDD = +12 V 10%; VCC = +5 V 5%; AGND [ADC] = AGND [DAC] = DGND = 0 V; VBIAS [ADC] = +5 V; VSWING [ADC] = +2.5 V; fCLK = 5 MHz external. All specifications TMIN to TMAX 1 unless otherwise noted.) |
Número de pieza similar - AD7769_15 |
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Descripción similar - AD7769_15 |
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