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CD40109BMS Datasheet(PDF) 6 Page - Intersil Corporation |
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CD40109BMS Datasheet(HTML) 6 Page - Intersil Corporation |
6 / 9 page 7-41 Specifications CD40109BMS Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A Interim Test 2 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A PDA (Note 1) 100% 5004 1, 7, 9, Deltas Interim Test 3 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A PDA (Note 1) 100% 5004 1, 7, 9, Deltas Final Test 100% 5004 2, 3, 8A, 8B, 10, 11 Group A Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11 Group B Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11 Subgroup B-6 Sample 5005 1, 7, 9 Group D Sample 5005 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3 NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS MIL-STD-883 METHOD TEST READ AND RECORD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD Group E Subgroup 2 5005 1, 7, 9 Table 4 1, 9 Table 4 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS FUNCTION OPEN GROUND VDD 9V ± -0.5V OSCILLATOR 50kHz 25kHz Static Burn-In 1 (Note 1) 4, 5, 11-13 2, 3, 6-10, 14, 15 1, 16 Static Burn-In 2 (Note 1) 4, 5, 11-13 8 16 1-3, 4, 7, 9, 10, 14, 15 Dynamic Burn-In (Note 4) 12 8 16 1, 4, 5, 11, 13 3, 6, 10, 14 (Note 3) 2, 7, 9, 15 (Note 3) Irradiation (Note 2) 4, 5, 11-13 8 1-3, 6, 7, 9, 10, 14-16 NOTES: 1. Each pin except Pin 1, VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V 2. Each pin except Pin 1, VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V 3. Pin voltage is VDD/2 4. Each pin except Pin 1, VDD and GND will have a series resistor of 4.75K ±5%, VDD = 18V ±0.5V. Logic Diagram FIGURE 1. 1 OF 4 UNITS TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP MIL-STD-883 METHOD GROUP A SUBGROUPS READ AND RECORD LEVEL SHIFTER LEVEL SHIFTER A ENABLE A VCC VDD * 3 (6, 10, 14) * 2 (7, 9, 15) VSS VDD E 4 (5, 11, 13) VCC = 1 VDD = 16 VSS = 8 VDD VSS * ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK TRUTH TABLE INPUTS OUTPUTS A, B, C, D ENABLE A, B, C, D E, F, G, H 010 111 X0 Z Logic 0 = Low(VSS) X = Don’t care Z = High impedance Logic 1 = VCC at Inputs and VDD at Outputs |
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Descripción similar - CD40109BMS |
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