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CD54AC103A Datasheet(PDF) 1 Page - Intersil Corporation

No. de pieza CD54AC103A
Descripción Electrónicos  Dual J-K Flip-Flop with Set and Reset
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Fabricante Electrónico  INTERSIL [Intersil Corporation]
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CD54AC103A Datasheet(HTML) 1 Page - Intersil Corporation

  CD54AC103A Datasheet HTML 1Page - Intersil Corporation  
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CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.
Copyright
© Harris Corporation 1994
1
SEMICONDUCT OR
CD54AC109/3A
CD54ACT109/3A
Dual “J-K” Flip-Flop with Set and Reset
Functional Diagram
1S
2S
2R
5
11
6
7
1Q
1Q
15
1
1R
2K
13
12
10
9
2Q
2Q
2CP
GND = 8
VCC = 16
2J
14
1K
3
4
1CP
1J
2
FF 1
FF 2
Description
The CD54AC109/3A and CD54ACT109/3A are dual “J-K”
flip-flops with set and reset that utilize the Harris Advanced
CMOS Logic technology. These flip-flops have independent
J, K, Set, Reset and Clock inputs and Q and Q outputs. The
CD54AC109/3A and CD54ACT109/3A changes state on the
positive-going transition of the clock. Set and Reset are
accomplished asynchronously by low-level inputs.
The CD54AC109/3A and CD54ACT109/3A are supplied in
16 lead dual-in-line ceramic packages (F suffix).
ACT INPUT LOAD TABLE
INPUT
UNIT LOAD (NOTE 1)
J, CP, CP
1
K
0.53
S, R
0.58
NOTE:
1. Unit load is
∆I
CC limit specified in DC Electrical Specifications
Table, e.g., 2.4mA Max at +25oC.
June 1997
File Number
3885
Absolute Maximum Ratings
DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6V
DC Input Diode Current, IIK
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, IOK
For VO < -0.5V or VO > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . .±50mA
DC Output Source or Sink Current, Per Output Pin, IO
For VO > -0.5V or VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . . .±50mA
DC VCC or GND Current, ICC or IGND
For Up to 4 Outputs Per Device, Add
±25mA For Each
Additional Output
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±100mA
Power Dissipation Per Package, PD
TA = -55
oC to +100oC (Package F) . . . . . . . . . . . . . . . . . . 500mW
TA = +100
oC to +125oC (Package F) . . . . . . . . Derate Linearly at
8mW/oC to 300mW
Operating Temperature Range, TA
Package Type F . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC
Storage Temperature, TSTG . . . . . . . . . . . . . . . . . . -65
oC to +150oC
Lead Temperature (During Soldering)
At Distance 1/16in.
± 1/32in. (1.59mm ± 0.79mm)
From Case For 10s Max . . . . . . . . . . . . . . . . . . . . . . . . . . +265oC
Unit Inserted Into a PC Board (Min Thickness 1/16in., 1.59mm)
With Solder Contacting Lead Tips Only. . . . . . . . . . . . . . . +300oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Recommended Operating Conditions
Supply Voltage Range, VCC
Unless Otherwise Specified, All Voltages Referenced to GND
TA = Full Package Temperature Range
CD54AC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V
CD54ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, VI, VO. . . . . . . . . . . . . . . . . . 0V to VCC
Operating Temperature, TA . . . . . . . . . . . . . . . . . . . -55
oC to +125oC
Input Rise and Fall Slew Rate, dt/dv
at 1.5V to 3V (AC Types) . . . . . . . . . . . . . . . . . . . 0ns/V to 50ns/V
at 3.6V to 5.5V (AC Types) . . . . . . . . . . . . . . . . . 0ns/V to 20ns/V
at 4.5V to 5.5V (AC Types) . . . . . . . . . . . . . . . . . 0ns/V to 10ns/V
COMING SOON!
COMPLETE DATA SHEET


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