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CDP1806ACEX Datasheet(PDF) 6 Page - Intersil Corporation

No. de pieza CDP1806ACEX
Descripción Electrónicos  CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer
Download  30 Pages
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Fabricante Electrónico  INTERSIL [Intersil Corporation]
Página de inicio  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CDP1806ACEX Datasheet(HTML) 6 Page - Intersil Corporation

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6
Minimum Set-Up And Hold Times (Note 2)
Data Bus Input Set-Up, tSU
-100
0
ns
Data Bus Input Hold, tH
125
225
ns
DMA Set-Up, tSU
-75
0
ns
DMA Hold, tH
100
175
ns
ME Set-Up, t
SU
125
320
ns
ME Hold, tH
050
ns
Interrupt Set-Up, tSU
-100
0
ns
Interrupt Hold, tH
100
175
ns
WAIT Set-Up, tSU
20
50
ns
EF1-4 Set-Up, tSU
-125
0
ns
EF1 -4 Hold, tH
175
300
ns
Minimum Pulse Width Times (Note 6)
CLEAR Pulse Width, tWL
100
175
ns
CLOCK Pulse Width, tW
75
100
ns
NOTES:
5. Typical values are for TA = 25
o C and nominal V
DD.
6. Maximum limits of minimum characteristics are the values above which all devices function.
Timing Specifications as a function of T (T = 1/fCLOCK) at TA = -40 to +85oC, VDD = 5V, ±15%
PARAMETER
CDP1805AC, CDP1806AC
UNITS
TYP
(NOTE 7)
MAX
High-Order Memory-Address Byte
Set-Up to TPA
Time, tSU
2T-275
2T -175
ns
MRD to TPA
Time, tSU
T/2 -100
T/2 -75
ns
High-Order Memory-Address Byte
Hold after TPA Time, tH
T/2 +75
T/2 +100
ns
Low-Order Memory-Address Byte
Hold after WR Time, tH
T +180
T +240
ns
CPU Data to Bus
Hold after WR Time, tH
T +110
T +150
ns
Required Memory Access Time, tACC
Address to Data
4.5T -440
4.5T -330
ns
NOTE:
7. Typical values are for TA = +25
oC and nominal V
DD.
Dynamic Electrical Specifications at TA = -40o to +85oC; C L = 50pF; Input tR, tF = 10ns; Input Pulse Levels = 0.1V to
VDD -0.1V; VDD = 5V, ±5%. (Continued)
PARAMETER
CDP1805AC CDP1806AC
UNITS
(NOTE 5)
TYP
MAX
CDP1805AC, CDP1806AC


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