AD9516-3_15 datasheet(6/80 Pages) AD

No. de pieza	AD9516-3

Descripción Electrónicos	14-Output Clock Generator with Integrated 2.0 GHz VCO

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AD9516-3

Data Sheet

Rev. C | Page 6 of 80

CLOCK INPUTS

Table 3.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

CLOCK INPUTS (CLK, CLK)

Differential input

Input Frequency

01

2.4

GHz

High frequency distribution (VCO divider)

01

1.6

GHz

Distribution only (VCO divider bypassed)

Input Sensitivity, Differential

150

mV p-p

Measured at 2.4 GHz; jitter performance is

improved with slew rates > 1 V/ns

Input Level, Differential

2

V p-p

Larger voltage swings may turn on the protection

diodes and may degrade jitter performance

Input Common-Mode Voltage, VCM

1.3

1.57

1.8

V

Self-biased; enables ac coupling

Input Common-Mode Range, VCMR

1.3

1.8

V

With 200 mV p-p signal applied; dc-coupled

Input Sensitivity, Single-Ended

150

mV p-p

CLK ac-coupled; CLK ac-bypassed to RF ground

Input Resistance

3.9

4.7

5.7

kΩ

Self-biased

Input Capacitance

2

pF

1

Below about 1 MHz, the input should be dc-coupled. Care should be taken to match VCM.

CLOCK OUTPUTS

Table 4.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

LVPECL CLOCK OUTPUTS

Termination = 50 Ω to VS − 2 V

OUT0, OUT1, OUT2, OUT3, OUT4, OUT5

Differential (OUT, OUT)

Output Frequency, Maximum

2950

MHz

Using direct to output; see Figure 25 for peak-to-

peak differential amplitude

Output High Voltage (VOH)

VS − 1.12

VS − 0.98

VS − 0.84

V

Output Low Voltage (VOL)

VS − 2.03

VS − 1.77

VS − 1.49

V

Output Differential Voltage (VOD)

550

790

980

mV

VOH − VOL for each leg of a differential pair for

default amplitude setting with driver not toggling;

see Figure 25 for variation over frequency

LVDS CLOCK OUTPUTS

Differential termination 100 Ω at 3.5 mA

OUT6, OUT7, OUT8, OUT9

Differential (OUT, OUT)

Output Frequency

800

MHz

The AD9516 outputs toggle at higher frequencies,

but the output amplitude may not meet the VOD

specification; see Figure 26

Differential Output Voltage (VOD)

247

360

454

mV

VOH − VOL measurement across a differential pair at

the default amplitude setting with output driver

not toggling; see Figure 26 for variation over

frequency

Delta VOD

25

mV

This is the absolute value of the difference

between VOD when the normal output is high vs.

when the complementary output is high

Output Offset Voltage (VOS)

1.125

1.24

1.375

V

(VOH + VOL)/2 across a differential pair

Delta VOS

25

mV

This is the absolute value of the difference

between VOS when the normal output is high vs.

when the complementary output is high

Short-Circuit Current (ISA, ISB)

14

24

mA

Output shorted to GND

CMOS CLOCK OUTPUTS

OUT6A, OUT6B, OUT7A, OUT7B,

OUT8A, OUT8B, OUT9A, OUT9B

Single-ended; termination = 10 pF

Output Frequency

250

MHz

See Figure 27

Output Voltage High (VOH)

VS − 0.1

V

At 1 mA load

Output Voltage Low (VOL)

0.1

V

At 1 mA load

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