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| ICL7650S |
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3 page 
3 Absolute Maximum Ratings Thermal Information Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . (V+ +0.3) to (V- -0.3) Voltage on Oscillator Control Pins . . . . . . . . . . . . . . . . . . . . V+ to V- Duration of Output Short Circuit. . . . . . . . . . . . . . . . . . . . . Indefinite Current to Any Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA While Operating (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . .100 µA Operating Conditions Temperature Range ICL7650SC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC Thermal Resistance (Typical, Note 2) θJA (oC/W) θJC (oC/W) 8 Lead PDIP Package . . . . . . . . . . . . . 120 N/A 14 Lead PDIP Package . . . . . . . . . . . . 80 N/A 8 Lead SOIC Package . . . . . . . . . . . . . 160 N/A Metal Can Package . . . . . . . . . . . . . . . 160 75 Maximum Junction Temperature (Hermetic Package) . . . . . . . .175oC Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . . -55oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Limiting input current to 100 µA is recommended to avoid latchup problems. Typically 1mA is safe, however this is not guaranteed. 2. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications VSUPPLY = ±5V. See Test Circuit, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS TEMP. (oC) MIN TYP MAX UNITS Input Offset Voltage (Note 3) VOS 25 - ±0.7 ±5 µV 0 to 70 - ±1 ±8 µV Average Temperature Coefficient of Input Offset Voltage (Note 3) ∆VOS/∆T 0 to 70 - 0.02 - µV/oC Change in Input Offset with Time ∆VOS/∆T 25 - 100 - nV/ √month Input Bias Current |I(+)|, |I(-)| IBIAS 25 - 4 10 pA 0 to 70 - 520 pA Input Offset Current |I(-), |I(+)| IOS 25 - 820 pA 0 to 70 - 10 40 pA Input Resistance RIN 25 - 1012 - Ω Large Signal Voltage Gain (Note 3) AVOL RL = 10kΩ, VO = ±4V 25 135 150 -dB 0 to 70 130 -- dB Output Voltage Swing (Note 4) VOUT RL = 10kΩ 25 ±4.7 ±4.85 - V RL = 100kΩ 25 - ±4.95 - V Common Mode Voltage Range (Note 3) CMVR 25 -5 -5.2 to +4 3.5 V 0 to 70 -5 - 3.5 V Common Mode Rejection Ratio (Note 3) CMRR CMVR = -5V to +3.5V 25 120 140 -dB 0 to 70 120 -- dB Power Supply Rejection Ratio PSRR VS = ±3V to ±8V 25 120 140 -dB Input Noise Voltage eN RS = 100Ω, f = DC to 10Hz 25 - 2 - µVP-P Input Noise Current iN f = 10Hz 25 - 0.01 - pA/ √Hz Gain Bandwidth Product GBWP 25 - 2 - MHz Slew Rate SR CL = 50pF, RL = 10kΩ 25 - 2.5 - V/ µs Rise Time tR 25 - 0.2 - µs Overshoot OS 25 - 20 - % Operating Supply Range V+ to V- 25 4.5 - 16 V Supply Current ISUPP No Load 25 - 2 3 mA 0 to 70 - - 3.2 mA Output Source Current IO SOURCE 25 2.9 4.5 - mA 0 to 70 2.3 - - mA ICL7650S |
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