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| ISL8394 |
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6 page 
6 Test Circuits and Waveforms Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1A. MEASUREMENT POINTS Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 1B. TEST CIRCUIT FIGURE 1. SWITCHING TIMES Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 2A. MEASUREMENT POINTS Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 2B. TEST CIRCUIT FIGURE 2. CHARGE INJECTION FIGURE 3A. MEASUREMENT POINTS Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 3B. TEST CIRCUIT FIGURE 3. BREAK-BEFORE-MAKE TIME 50% tr < 20ns tf < 20ns tON 75% 3V VNC 0V tOFF LOGIC INPUT SWITCH OUTPUT 75% VOUT 25% 25% tON tOFF VNO V OUT V (NO or NC) R L R L R ON () + ------------------------------ = SWITCH INPUTS LOGIC INPUT VOUT RL CL COM NO IN 300 Ω 35pF GND V+ C V- C VNO C NC VNC C VOUT ∆VOUT ON OFF ON Q = ∆VOUT x CL SWITCH OUTPUT LOGIC INPUT 3V 0V CL VOUT RG VG GND COM NO OR NC V+ C LOGIC INPUT IN C V- 80% 3V 0V tD LOGIC INPUT SWITCH OUTPUT 0V VOUT LOGIC INPUT IN COM RL CL VOUT 35pF 300 Ω NO NC V+ GND VNX C C ISL8394 |
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