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BU9797FUV-M Datasheet(PDF) 10 Page - Rohm |
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BU9797FUV-M Datasheet(HTML) 10 Page - Rohm |
10 / 28 page 10/25 BU9797FUV-M MAX 144 segments (SEG36×COM4) Datasheet TSZ02201-0P4P0D300430-1-2 26.Aug.2013 Rev.001 www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111 ・ 15 ・ 001 OSCILLATOR The clock signals for logic and analog circuit can be generated from internal oscillator or external clock. If internal oscillator circuit is used, OSCIN must be connected to VSS level. When using external clock mode, input external clock from OSCIN terminal after ICSET command setting. Figure 10. Internal oscillator circuit mode Figure 11. Ext clock input mode LCD Driver Bias Circuit This device generates LCD driving voltage with on-chip Buffer AMP. And it can drive LCD at low power consumption. 1/3 and 1/2Bias can set in MODESET command. Line and frame inversion can set in DISCTL command. Refer to the “LCD driving waveform” about each LCD driving waveform. Blink timing generator This device has Blink function. This device will be Blink mode with BLKCTL command. Blink frequency varies widely by characteristic of fCLK, when internal oscillation circuit. About the characteristics of fCLK, refer to Oscillation Characteristics. Reset initialize condition Initial condition after execute Software Reset is as follows. ・ Display is OFF. ・ DDRAM address is initialized (DDRAM Data is not initialized). Refer to Command Description about initialize value of register. Command / Function List Description List of Command / Function No. Command Function 1 Set IC Operation (ICSET) Software reset, internal/external clock setting 2 Display control (DISCTL) Frame frequency, power save mode setting 3 Address set (ADSET) DRAM address setting (00h to 23h) Register address setting (24 to 25h) 4 Mode set (MODESET) Display on/off,1/2bias,1/3bias 5 Blink control (BLKCTL) Blink off/0.5s/1s/2s/3s/5s blink setting 6 All pixel control (APCTL) All pixels on/off during DISON OSCIN BU9797 VSS OSCIN BU9797 VSS Clock |
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