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932SQ426 Datasheet(PDF) 6 Page - Integrated Device Technology

No. de pieza 932SQ426
Descripción Electrónicos  64-pin TSSOP and VFQFPN packages
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Fabricante Electrónico  IDT [Integrated Device Technology]
Página de inicio  http://www.idt.com
Logo IDT - Integrated Device Technology

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932SQ426
CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKINGS
IDT®
CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKINGS
6
932SQ426
REV B 070815
Pin Descriptions (VFQFPN)
PIN #
PIN NAME
TYPE
DESCRIPTION
1GNDPCI
932S
Q426
Ground pin for PCI outputs and logic.
2
VDDPCI
PWR
3
PCI4_2x
OUT 3.3V PCI clock output
4
PCI3_2x
OUT 3.3V PCI clock output
5
PCI2_2x
OUT 3.3V PCI clock output
6
PCI1_2x
OUT 3.3V PCI clock output
7
PCI0_2x
OUT 3.3V PCI clock output
8
GNDPCI
PWR Ground pin for PCI outputs and logic.
9
VDDPCI
PWR 3.3V power for the PCI outputs and logic
10
VDD48
PWR 3.3V power for the 48MHz output and logic
11
48M_2x
OUT 3.3V 48MHz output
12
GND48
PWR Ground pin for 48MHz output and logic.
13
GND96
PWR Ground pin for DOT96 output and logic.
14
DOT96T
OUT
True clock of differential 96MHz output. These are current mode outputs and external series resistors and
shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific
values.
15
DOT96C
OUT
Complementary clock of differential 96MHz output. These are current mode outputs and external series
resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations
for specific values.
16
AVDD96
PWR 3.3V power for the 48/96MHz PLL and the 96MHz output and logic
17
TEST_MODE
IN
TEST_MODE is a real time input to select between Hi-Z and REF/N divider mode while in test mode. Refer
to Test Clarification Table.
18
CKPWRGD#/PD
IN
CKPWRGD# is an active low input used to sample latched inputs and allow the device to Power Up. PD is
an asynchronous active high input pin used to put the device into a low power state. The internal clocks
and PLLs are stopped.
19
VDDSRC
PWR 3.3V power for the SRC outputs and logic
20
SRC0T
OUT
True clock of differential SRC output. These are current mode outputs and external series resistors and
shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific
values.
21
SRC0C
OUT
Complementary clock of differential SRC output.
These are current mode outputs and external series
resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations
for specific values.
22
GNDSRC
PWR Ground pin for SRC outputs and logic.
23
SRC1C
OUT
Complementary clock of differential SRC output.
These are current mode outputs and external series
resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations
for specific values.
24
SRC1T
OUT
True clock of differential SRC output. These are current mode outputs and external series resistors and
shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific
values.
25
SRC2C
OUT
Complementary clock of differential SRC output.
These are current mode outputs and external series
resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations
for specific values.
26
SRC2T
OUT
True clock of differential SRC output. These are current mode outputs and external series resistors and
shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific
values.
27
VDDSRC
PWR 3.3V power for the SRC outputs and logic
28
AVDD_SRC
PWR 3.3V power for the SRC PLL analog circuits
29
GNDSRC
PWR Ground pin for SRC outputs and logic.
30
IREF
OUT
This pin establishes the reference current for the differential current-mode output pairs. This pin requires a
fixed precision resistor tied to ground in order to establish the appropriate current. 475 ohms is the
standard value.
31
NS_SRC0C
OUT
Complementary clock of differential non-spreading SRC output. These are current mode outputs and
external series resistors and shunt resistors are required for termination. See Test Loads and
Recommended Terminations for specific values.
32
NS_SRC0T
OUT
True clock of differential non-spreading SRC output.
These are current mode outputs and external series
resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations
for specific values.


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